Implement USB 3.0 Gen 1 8b/10b as a stateful part of the physical layer—not as a byte-to-code lookup table alone. Carry running disparity across data and control symbols, scramble data before encoding, reset the scrambler on COM, implement the assigned K-codes and ordered-set rules, and verify the actual 10-bit stream with its disparity history intact.
What 8b/10b does in USB 3.0
USB 3.0 Gen 1 maps each 8-bit character to a 10-bit transmitted symbol. The code uses 5b/6b and 3b/4b sub-codes, with running disparity controlling which legal representation is selected. This helps keep the serial stream DC-balanced by bounding differences between the number of ones and zeros.
The format adds two transmitted bits for every eight source bits: a structural 25% increase in bit count relative to the source characters, not a measured throughput result. Actual achieved throughput depends on more than this coding ratio, and the cited references do not establish a benchmark for a particular implementation.
Nexperia’s Design Engineer’s Guide ESD Application Handbook (2023) describes USB 3.0 and USB 3.1 as using 8b/10b coding to replace 8-bit data with 10-bit data. The USB-IF Inter-Chip Supplement to the USB Revision 3.0 Specification, Revision 1.02 (2014), states that information communicated in PWM-BURST and HS-BURST states shall be 8b/10b encoded. That normative statement is specific to those states in the inter-chip supplement; it should not be read as a complete description of every USB 3.0 operating state.
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Implement running disparity as encoder and decoder state
Transmit: choose, emit, update
The encoder needs to know its current running disparity before encoding each symbol. For each data or control character, select the legal 10-bit representation for that state, emit it, and update running disparity from the symbol actually sent. Do not update state from the input byte, or reset it at a data/control boundary unless the specification explicitly requires that behavior.
- Track running disparity as persistent state across consecutive transmitted symbols.
- Look up the character’s legal code for the current disparity state.
- Emit that 10-bit code and update the state according to its disparity.
- Apply the same sequence to K-coded control characters as to data characters.
This stateful behavior is why an encoder that produces plausible byte values can still put illegal symbols on the wire: the selected disparity variant may be wrong even when the character mapping itself is correct.
Receive: lock, validate, report
On receive, establish the initial disparity from the first symbol used for lock. For each subsequent symbol, check both that the 10-bit pattern is a legal code and that it belongs to the expected disparity column. A pattern that decodes to a familiar character is not sufficient if it violates the legal code or disparity sequence.
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The USB 3.0 specification’s receive behavior, as summarized in the supplied source material, does not make a disparity error an automatic retraining trigger. The physical layer informs the link layer of disparity or decode errors; do not silently discard the error and retrain as a substitute for that reporting path.
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For Gen 1 SuperSpeed, scramble data characters before 8b/10b encoding. On receive, decode the 10-bit symbol first, then descramble the recovered data. The scrambler is not applied to control symbols. The free-running LFSR resets whenever COM is sent or received.
- Keep the data and control paths distinct so a K-coded control character is not accidentally scrambled as payload.
- Reset the LFSR at COM on both transmit and receive paths.
- If the implementation provides a disable-scrambling mode, expose it as a controlled test or debug option rather than normal traffic behavior.
When debugging a mismatch, examine the order of operations and reset boundaries alongside the disparity state. A correct 8b/10b table cannot compensate for scrambling at the wrong stage or for an LFSR that does not reset on COM.
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Implement the USB-IF K-symbol assignments
Control characters are assigned K-codes; they are not generic escape bytes. The USB-IF inter-chip supplement distinguishes the SuperSpeed SDP mapping from its inter-chip mapping: SDP is K28.2 in SuperSpeed and K28.6 in the inter-chip mapping. The other assignments below are listed by that supplement.
| Control symbol | K-code | Protocol role |
|---|---|---|
| COM | K28.5 | Alignment; resets the scrambler |
| EDB | K28.3 | Error condition |
| SDP | K28.2 in SuperSpeed; K28.6 in the inter-chip mapping | Start of packet |
| EPF | K23.7 | Packet framing |
| SHP | K27.7 | Packet framing |
| END | K29.7 | Packet framing |
| SLC | K30.7 | Control symbol |
| SKP | K28.1 | Clock compensation |
| SUB | K28.4 | Substitute condition |
The supplement notes that most SuperSpeed control symbols are K-encoded as in USB 3.0, with SDP as the exception. Preserve the context of the mapping in your implementation: do not substitute the inter-chip SDP code into the SuperSpeed path.
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Use control symbols only in their defined context
- COM: provide the defined recognizable alignment symbol and scrambler reset point.
- SHP, EPF, and END: use them to delimit packets and framing as required by the protocol.
- SKP: use it for clock compensation only under the applicable ordered-set rules; do not insert an equivalent symbol arbitrarily.
- EDB and SUB: preserve their error and substitute meanings as defined by the link and physical layers.
Knowing each symbol’s K-code is only part of compliance. The transmitter must also place it in the protocol-defined ordered sets and maintain disparity through the resulting stream.
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Verify the encoder and receiver in layers
Start with exhaustive symbol tests
- Test every legal D.x.y and K.x.y mapping for both running-disparity inputs.
- Check the emitted symbol and next disparity state for every test case.
- Exercise transitions across long data runs, ordered sets, COM resets, SKP insertion, electrical-idle exit, and disparity initialization after lock.
- Inject invalid 10-bit symbols and disparity violations. Confirm that the physical layer reports them through the specified link-layer error path.
Testing both disparity inputs matters: a test that covers each character only from one state can miss a wrong alternate code or state transition.
Capture the actual 10-bit symbols
Use an analyzer that preserves the transmitted 10-bit patterns and running-disparity history. Teledyne LeCroy’s Probe Design for SuperSpeed Protocol Analyzers warns that a PIPE PHY may convert the stream into 8-bit patterns and discard the original 10-bit code and disparity information. If that information is lost, reconstructing whether an invalid 10-bit symbol was received can be impossible. The document identifies its Voyager M3i and Advisor T3 analyzers as retaining true 10-bit capture for this debugging use.
For each capture, correlate the decoded symbols with scrambler state, ordered-set boundaries, CRC and error indications, and LTSSM events. This makes it possible to distinguish a bad code or disparity transition from a scrambling, framing, or higher-layer symptom.
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What to check when evaluating an encoder or PHY
When comparing implementations or IP blocks, assess the complete path rather than only whether an 8-bit input produces an output. Useful comparison criteria are:
- Coverage of the legal 8b/10b table for both running-disparity inputs, including data and control characters.
- Correct running-disparity initialization, selection, and update on transmit and receive.
- Scrambler placement, exclusion of control symbols from scrambling, and COM reset behavior.
- Correct K-symbol assignments and ordered-set behavior for the intended USB 3.0 mode.
- Error reporting semantics for invalid codes and disparity errors.
- Access to raw 10-bit symbols and disparity history for lab debugging.
- Interoperability or compliance evidence relevant to the specific implementation.
A byte-level interface may be adequate for normal operation, but it can hide the information needed to diagnose physical-layer coding faults. Make raw symbol and disparity visibility part of the debug plan.
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