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NVIDIA presented its first NVSwitch at Hot Chips 30 in 2018 as a GPU-to-GPU NVLink switch: an 18-port, 18×18 non-blocking crossbar designed to connect GPUs inside a system, not a general-purpose network switch. In the DGX-2, twelve NVSwitch chips joined 16 Tesla V100 GPUs across two eight-GPU baseboards. NVIDIA specified 2.4 TB/s of chassis bisection bandwidth; its presentation separately reported a 1.98 TB/s achieved read-bisection result in a particular test.
What NVIDIA introduced at Hot Chips 30
NVSwitch was presented as a bridging device for GPU traffic over NVLink. NVIDIA explicitly distinguished it from a general networking device: it was built to route traffic among GPUs within an accelerated-computing system. The 2018 presentation described the switch’s crossbar, port-level routing and packet processing, buffers, and management logic. Packet transformations were intended to make multi-GPU traffic appear, from the relevant GPU-side perspective, as traffic to or from a single GPU. NVIDIA’s Hot Chips 30 presentation
The design addressed a limitation of direct GPU-to-GPU connections: each GPU has a finite number of links to distribute among peers, so direct attachment constrains the bandwidth available to each pair as the number of GPUs grows. A switched fabric offers paths between source and destination GPUs and can interleave traffic across paths. That does not eliminate contention: traffic competing for the same destination or exceeding aggregate link capacity still shares the available bandwidth. NVIDIA’s explanation of NVSwitch and NVLink
What the first NVSwitch contained
The values below are figures NVIDIA reported for the 2018 design. Bandwidth figures are bidirectional, as specified in the presentation.
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| Specification | NVIDIA’s 2018 figure |
|---|---|
| NVLink ports per switch | 18 |
| Crossbar | 18×18, non-blocking |
| Bandwidth per NVLink | 51.5 GB/s bidirectional |
| Aggregate bandwidth per switch | 928 GB/s bidirectional |
| Lane signaling | 25.78125 Gbps NRZ; eight lanes per NVLink |
| Transistor count | 2 billion |
| Manufacturing process | TSMC 12FFN |
| Die area | 106 mm² |
| Load/store bandwidth efficiency | 80.0% for 128-byte packets |
| Copy-engine bandwidth efficiency | 88.9% for 256-byte packets |
NVIDIA’s separate NVSwitch technical overview uses rounded values: 50 GB/s per port for both directions and 900 GB/s aggregate per switch. Those rounded overview figures are not identical to the Hot Chips deck’s 51.5 GB/s and 928 GB/s; they reflect different presentation precision and context, so they should not be combined as if they were one set of exact specifications.
How NVSwitch connected the DGX-2 GPUs
The DGX-2 used two eight-GPU baseboards, with six NVSwitch chips on each board. Each GPU connected to each of the six switches on its own baseboard. The two eight-GPU building blocks were joined through switch links, forming the 16-GPU fabric with 12 NVSwitch chips in total. NVIDIA’s Hot Chips presentation specified 2.4 TB/s of chassis bisection bandwidth for this design. NVIDIA’s Hot Chips 30 presentation
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NVIDIA’s technical overview describes communication between GPUs on the same baseboard as a 300 GB/s path with one NVSwitch traversal. Reaching a GPU on the other baseboard requires two switch traversals. The overview also gives 2.4 TB/s as the between-board bisection bandwidth. These are NVIDIA’s descriptions of the topology and system bandwidth, not independent measurements. NVIDIA’s NVSwitch technical overview
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- 16 Tesla V100 GPUs and 512 GB aggregate HBM2.
- 300 GB/s bidirectional NVLink bandwidth per GPU.
- 14.4 TB/s aggregate HBM2 bandwidth.
- Two Intel Xeon Platinum 8168 CPUs.
In an August 21, 2018 blog post about DGX-2, NVIDIA also described the system as having two 24-core Xeon CPUs, 1.5 TB of DDR4 memory, and 30 TB of NVMe storage. Those details come from that blog’s accompanying system description. NVIDIA Developer Blog, “NVSwitch Accelerates NVIDIA DGX-2”
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How to interpret the bandwidth figures
Bisection bandwidth describes the capacity available across a division of a system’s fabric; it is not the speed of one GPU link or a guarantee that every workload will sustain that rate. NVIDIA’s presentation distinguishes the DGX-2’s 2.4 TB/s chassis bisection specification from a test result: it reported 1.98 TB/s of achieved read bisection bandwidth for the test described in the slides, which NVIDIA said matched theoretical bandwidth at 80% bidirectional NVLink efficiency. The 1.98 TB/s figure is therefore a result from that stated test, not a replacement for the 2.4 TB/s system specification. NVIDIA’s Hot Chips 30 presentation
Per-link bandwidth, per-GPU bandwidth, per-switch aggregate bandwidth, and system bisection bandwidth describe different parts of the fabric. They cannot be substituted for one another: a system’s usable communication rate depends on its topology, traffic pattern, message sizes, and competing traffic as well as the rated capacity of its links.
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What NVIDIA’s DGX-2 performance slides claimed
NVIDIA’s 2018 presentation compared DGX-2 with two DGX-1 servers using the same total GPU count. For four named application cases, it reported these speedups:
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|---|---|
| Physics (MILC) | 2× |
| Weather (ECMWF) | 2.4× |
| Language model (Transformer with mixture of experts) | 2× |
| Recommender (sparse embedding) | 2.7× |
These are vendor-reported results for the workloads and configurations shown in the slides. They do not establish that DGX-2—or NVSwitch—makes every application faster by those amounts. Performance depends on how much a workload communicates between GPUs, its compute and memory demands, and the configuration being compared. NVIDIA’s Hot Chips 30 presentation
Scope: the 2018 design, not later NVSwitch generations
The 18-port crossbar, bandwidth figures, and DGX-2 topology here describe the first NVSwitch design presented at Hot Chips 30 in 2018. They should not be assumed to describe later NVSwitch generations or other NVIDIA systems. NVIDIA’s March 2018 blog provides explanatory context for the original crossbar approach, while the Hot Chips presentation and technical overview document the 2018 design and its DGX-2 use. NVIDIA Developer Blog, “NVSwitch: Leveraging NVLink to Maximum Effect”
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