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Adam Taylor’s MicroZed Chronicles walkthrough uses the AMD ZCU111 RFSoC evaluation platform to demonstrate a practical converter loopback: digital-to-analog converter (DAC) outputs are routed through a breakout card into analog-to-digital converter (ADC) inputs, then captured data is viewed on a PC. The example makes RFSoC’s integrated processing and conversion resources tangible, but it is a dated setup demonstration—not a benchmark or a current, guaranteed-to-work recipe.
What are the RFSoC and ZCU111?
An RFSoC combines high-speed RF converters with processing resources on one device: processor-system (PS) CPUs and programmable logic (PL) sit alongside ADCs and DACs. That integration can simplify prototyping designs for communications, radar, cable access and other RF signal-processing applications. It does not, by itself, make a finished radio; a complete design still depends on its analog signal path, clocking, processing and interfaces.
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The ZCU111 is an evaluation platform built around an AMD Zynq UltraScale+ RFSoC. AMD specifies eight 12-bit ADC channels at up to 4.096 GSPS, eight 14-bit DAC channels at up to 6.554 GSPS, and eight soft-decision forward-error-correction (SD-FEC) blocks on its ZCU111 product page. These are published hardware specifications, not results from Taylor’s loopback.
The board also provides interfaces for moving data and integrating a prototype, including four SFP28 lanes and FMC+ high-pin-count connectivity. AMD’s ZCU111 Evaluation Board User Guide (UG1271, revision 1.4, released April 28, 2023) lists 4 GB of DDR4 memory on the PS side and 4 GB on the PL side. Taylor describes the PS memory as useful for higher-level system or software tasks and PL-side memory for signal-processing paths.
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What hardware and software does the loopback use?
The demonstration uses the ZCU111 with an RFMC XM500 balun card. The card brings RF signals to SMA connections through baluns and attenuation, making it possible to connect converter channels externally. The board and card provide a route for prototyping; they do not remove the need to consider signal conditioning, clock selection and the limits of the particular analog path.
In Taylor’s described setup, a reference-design image is loaded from an SD card, the RF Data Converter Evaluation GUI is installed on a PC, and the PC communicates with the board over Ethernet. AMD’s RF Data Converter Evaluation Tool User Guide likewise describes using a ZCU111 and PC GUI to configure converter operation and run basic tests, including FFT analysis.
AMD’s ZCU111 product brief describes a kit that includes the base board and XM500 RFMC card, along with items such as filters, cables, a MicroSD card, a Vivado license voucher and access to an AMS reference design. Contents and software or license terms can vary; confirm what is included with a current order.
How does the DAC-to-ADC loopback work?
- Connect the analog route. DAC outputs feed ADC inputs through the RFMC balun breakout and its SMA connections. The physical connection and any required external signal conditioning must suit the chosen channels and signal levels.
- Load and connect the evaluation setup. Taylor describes booting a reference-design image from SD and connecting the PC’s evaluation GUI to the board over Ethernet.
- Configure converter tiles. The GUI is used to set up DAC and ADC operation, then to acquire data for inspection. Exact settings depend on the reference design, clock plan and software and hardware revisions.
- Inspect the capture. The captured ADC data is displayed for analysis. Taylor reports seeing the expected signal locations in the acquired frequency-domain view.
This workflow is useful because a generated DAC signal can be followed through a real analog route and back into an ADC capture. It demonstrates configuration and observation, rather than establishing how every RFSoC system or board configuration will perform.
What settings and results did Taylor report?
The following values belong to Taylor’s particular example. They are not universal defaults, a recommended current clock plan or independently validated measurements.
| Part of example | Reported setting or observation |
|---|---|
| DAC tile 1 | 6,389.76 MHz sample clock; interpolation ×8; 1,500 MHz mixer frequency; high-linearity decoder mode; crossbar I/Q configuration. |
| ADC tile 1 | 3,194.88 MHz sample clock; decimation ×4; −1,200 MHz mixer frequency. |
| DAC signals | Center frequencies of 150 MHz and 200 MHz. |
| ADC capture | Taylor reports baseband signals at 150 MHz and 100 MHz, respectively, consistent with the mixer behavior he describes. |
Reproducing those observations requires more than entering the listed frequencies: the clock plan, tile configuration, analog route, reference design and software versions must also match appropriately. Taylor’s report does not include a calibrated performance campaign or an uncertainty budget.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.What can the demonstration establish—and what can’t it?
The walkthrough establishes that Taylor configured a ZCU111 example loopback and observed signals at the expected locations in the captured frequency-domain view. It illustrates why combining converters, programmable logic and CPUs can be useful when exploring RF designs.
It does not establish a noise floor, dynamic range, usable bandwidth or end-to-end radio performance for other configurations. Nor is it a comparison with competing development boards. Those conclusions would require evidence beyond this example and the board’s published converter specifications.
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What should you check before trying it today?
- Verify the current software path. Taylor’s SD-card image, GUI version, Ethernet workflow and Vivado-era tools are historical details. Check current AMD documentation and support for a compatible reference design and toolchain before setting up the board.
- Match the complete configuration. Confirm the board and device revision, reference-design version, clocking, converter tile settings, and physical analog connections—not just the sample rates and mixer frequencies in Taylor’s example.
- Confirm the kit and commercial details. AMD’s product page showed a price of $14,995 and an eight-week lead time when accessed October 4, 2026. Both figures are time-sensitive; check current price, stock, lead time, export-compliance requirements and package contents with AMD or an authorized seller before purchase.
Product prices and availability are accurate as of the date/time indicated and are subject to change. Any price and availability information displayed on Amazon at the time of purchase will apply.
