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To check whether an AI program runs on RISC-V, verify the exact release and target architecture, then confirm its package or binary, operating-system and ABI requirements, CPU profile and extensions, dependencies, container platform, and real runtime behavior. A generic claim such as “Linux supported” is not enough: you need evidence for a concrete target such as riscv64 on a named distribution release with a compatible ABI and instruction-set profile.
Use the workflow below to separate published architecture support from a successful compilation or a binary that merely identifies itself as RISC-V. Finish with a small model inference on the actual board and record the complete software and hardware combination before treating the application as deployable.
What does it mean for AI software to support RISC-V?
RISC-V is an open standard instruction set architecture, not one uniform processor. RISC-V International describes it as an open ISA based on established reduced-instruction-set-computer principles. A 64-bit Linux target is commonly identified as riscv64, but processors can implement different profiles, optional extensions, ABIs, vector capabilities, and vendor-specific devices.
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Therefore, “supports RISC-V” is incomplete unless it names the artifact and target. A useful support statement includes:
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- the project and exact version or release date;
- the operating system and distribution release;
- the target triple and ABI, such as a Linux
riscv64build; - the required base ISA, profile, and extensions, including whether vector instructions are needed;
- the package, source-build, or container distribution method;
- dependency, accelerator, driver, and kernel requirements; and
- whether the publisher tested the same class of CPU and workload.
These details matter because an executable can be tagged RISC-V yet require a dynamic loader, shared library, kernel interface, or instruction extension that your board does not provide.
How do I check an AI package or release for RISC-V support?
Follow these seven checks in order. Each one narrows a different compatibility risk; passing an earlier check never substitutes for a later runtime test.
1. Pin the exact artifact
Record the project name, version, release date, operating system, distribution release, Python version if relevant, and installation channel. Read the publisher’s release notes, supported-platform matrix, package registry metadata, and issue tracker for explicit terms such as riscv64, riscv, RV64, or a named RISC-V profile.
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1Clear out junk files and repair common Windows errors2Fix the driver behind crashes, sound loss and screen glitches3Repair Windows errors before they cause bigger problemsDo not treat a generic Linux support statement as architecture evidence. A package may publish Linux builds only for x86-64 or ARM64 while using the same Linux label. Save the exact package filename, wheel tag, container digest, or source commit so another person can reproduce the check.
2. Identify the target machine
On the board, establish the architecture, word size, ABI, and available ISA information before installing software:
uname -m
getconf LONG_BIT
cat /proc/cpuinfo
On a 64-bit Linux installation, uname -m normally reports riscv64. The CPU information may expose an ISA string or extension list, although the exact fields depend on the kernel and firmware. Confirm the toolchain and ABI used by the distribution or vendor rather than assuming that every RV64 processor is interchangeable.
RISC-V International publishes profile and ABI specifications, while LLVM documents riscv32 and riscv64 targets and profile or extension selection through -march. Compare the software’s stated requirements with the machine’s actual profile; in particular, do not assume that a 64-bit target includes the vector extension.
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3. Check distribution packages and dependencies
For Debian-family systems, inspect the architecture and repository metadata for the exact release and version:
dpkg --print-architecture
apt-cache policy package-name
apt-cache show package-name | grep -E '^(Architecture|Version|Depends|Recommends):'
For an RPM-based distribution, use the equivalent architecture and package queries, such as rpm --eval '%{_arch}' and dnf info package-name. Check optional modules as well as the main package. A repository entry for riscv64 proves that maintainers built a package for that distribution release; it does not prove that every upstream feature, plugin, or accelerator backend is present.
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Canonical lists riscv64 as an officially supported Ubuntu architecture. Its baseline has changed: Ubuntu 20.04 through 25.04 assumed RVA20, while Ubuntu 25.10 and newer assume RVA23. Match the software’s documented minimum profile to the release installed on the board.
4. Inspect native binaries
For an executable or shared object, inspect the ELF header and loader:
readelf -h ./program | grep -E 'Class|Machine|Flags'
readelf -l ./program | grep 'Requesting program interpreter'
ldd ./program
An ELF machine field identifying RISC-V proves that the file targets the RISC-V machine type. It does not prove that the named dynamic loader exists, that every shared library is available, that the kernel provides required interfaces, or that the CPU implements all encoded extensions. Resolve missing libraries and compare the interpreter path with the filesystem on the target before drawing a conclusion.
5. Inspect container platform metadata
Require an OCI or Docker manifest entry for linux/riscv64:
docker manifest inspect image:tag
docker buildx imagetools inspect image:tag
After selecting the RISC-V variant, inspect its user-space libraries and run a harmless architecture check:
docker run --rm --platform=linux/riscv64 image:tag uname -m
A manifest entry proves that a variant was published. It does not prove that the image’s kernel assumptions, device access, accelerator runtime, peripherals, or application features work on your board. A test performed through emulation can also hide hardware-specific failures.
6. Separate a successful build from runtime evidence
A source build demonstrates only that the selected source, compiler, linker, dependencies, and build options produced an artifact under those conditions. It does not establish complete dependency coverage, correct numerical results, tested performance, or portability to another RISC-V CPU. Keep the compiler target flags, profile and extension settings, and build log with the artifact.
7. Run a small real workload
Once installation succeeds, perform a smoke test on the intended machine. Import the framework, load a tiny known-good model, execute one CPU inference, and exercise any required vector, accelerator, or device path. Capture the exact error, model, input shape, software versions, kernel, board, and CPU profile. One successful inference is evidence for that combination only; it is not a universal compatibility claim.
A minimal Python check can establish that the package imports and performs tensor arithmetic:
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python -c 'import framework; print(framework.__version__)'
Replace framework with the package under test, then run the project’s smallest documented model example. Keep import, model-loading, CPU execution, and accelerator execution as separate checkpoints so a failure has a clear boundary.
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Use the strongest evidence available and state its limits. The following distinctions prevent overclaiming.
| Evidence | What it establishes | What it does not establish |
|---|---|---|
Publisher or package registry entry for riscv64 |
A build was published for that architecture and stated release. | It does not prove every CPU extension, dependency, optional feature, board driver, or workload. |
Distribution package for riscv64 |
Distribution maintainers built a package for a particular release. | It does not prove universal upstream feature coverage or compatibility with another distribution. |
| ELF RISC-V machine field | The executable targets the RISC-V machine type. | It does not prove the loader, libraries, kernel interfaces, ABI, or required extensions are available. |
linux/riscv64 container manifest entry |
An image variant was published for that platform. | It does not prove board peripherals, kernel assumptions, device access, or application-level support. |
| Successful source build | Compilation succeeded under the selected conditions. | It does not prove runtime correctness, tested performance, dependency completeness, or portability. |
| Successful smoke test on the target board | The tested version, model, hardware, and software path worked together. | It does not generalize to other RISC-V profiles, boards, models, or accelerator configurations. |
How do CPU profiles, extensions, ABI, and Linux releases affect the result?
The target triple is only the starting point. The ABI determines how binaries exchange data and call libraries; the profile and extensions determine which instructions a binary may execute; and the distribution determines loaders, libraries, compiler defaults, and kernel behavior.
Profiles and extensions
RV64I identifies a 64-bit integer base ISA, not a complete application platform. A project may require floating-point, atomic, compressed, vector, or other extensions. LLVM’s -march option expresses the selected base and extensions, so compare the project’s build flags with the CPU’s advertised ISA. If a program exits with an illegal-instruction error, an extension mismatch is a leading suspect.
ABI and user space
A binary built for one RISC-V ABI can fail even when the kernel reports riscv64. Confirm the ABI used by the distribution toolchain and verify that the dynamic loader and libraries come from the same user-space environment. Mixing files from different distributions or ABIs can produce loader errors, unresolved symbols, or subtle runtime faults.
Ubuntu profile assumptions
| Ubuntu release range | Canonical baseline noted for RISC-V | Verification implication |
|---|---|---|
| 20.04 through 25.04 | RVA20 | Check that the application does not require a newer profile or extension. |
| 25.10 and newer | RVA23 | Confirm that the board and firmware meet the newer baseline and that external binaries match the release user space. |
These are distribution assumptions, not a guarantee that every board implements every optional feature or that an application has been tested on every Ubuntu release.
Does ONNX Runtime run on RISC-V?
ONNX Runtime’s documented architecture matrix marks Linux RISCV64 as supported and Windows RISCV64 as unsupported in the cited table. Its documentation also describes cross-compilation with a GNU RISC-V toolchain and an emulator for a specified CPU and operating-system target.
Check the exact ONNX Runtime release, execution provider, and model operators you need. A Linux RISCV64 core build may support CPU inference while a particular accelerator provider, optimized kernel, or operator set remains unavailable. After installation, run a small model that exercises the operators and execution provider used in production, not just an import test.
Can PyTorch be installed on riscv64?
The RISE project reports that torch 2.13.0 can be installed on riscv64 from its extra Python package index. The report lists manylinux_2_39_riscv64 wheels for CPython 3.12, 3.13, 3.14, and 3.14t. At the time of that report, upstream PyPI had not published a RISC-V torch wheel and the project described remaining work.
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Treat those wheels as release- and interpreter-specific evidence, not as a promise for every PyTorch version or board. Match the wheel tag to the Python interpreter, verify dependencies and ABI, and test the features you need. A wheel that imports and performs CPU tensor operations may still lack a supported backend, vector optimization, or extension required by your model.
Is TensorFlow officially available for RISC-V?
TensorFlow’s official pip requirements document Ubuntu, macOS, and Windows arrangements and describe a third-party ARM64 package path, but they do not list an official RISC-V pip binary target. For a RISC-V deployment, require release-specific evidence from a third-party package or a reproducible source build unless TensorFlow publishes a RISC-V artifact for the exact version.
When using a source build, record the compiler target, profile and extension flags, dependency versions, and enabled CPU or accelerator options. Then run model loading and inference on the target; compilation alone does not establish that TensorFlow kernels, delegates, or device integrations work.
How should I compare two RISC-V implementations?
Two options labeled RISC-V are interchangeable only when their target and runtime evidence align. Compare the following dimensions explicitly.
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|---|---|
| Release and support status | Is support documented for the exact version, and is it upstream, distribution-maintained, third-party, or community-provided? |
| Operating system and ABI | Which Linux distribution and release, loader, libc, and ABI are required? |
| ISA profile and extensions | Does it require a particular RVA profile, vector support, or other extension? |
| Package versus source | Is there a reproducible binary, or must you maintain a source build and toolchain? |
| Dependencies and accelerators | Are all shared libraries, execution providers, drivers, and device runtimes available? |
| Container platform | Does the image publish linux/riscv64, and do its device and kernel assumptions match the board? |
| Native testing | Does the project report tests on comparable RISC-V hardware, or only cross-compilation and emulation? |
Use a confidence label in your notes: published artifact, distribution package, source build, or target-board smoke test. The label makes it clear what has been demonstrated and what remains an assumption.
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There is no matching package or wheel
Confirm the interpreter version, platform tag, distribution release, and package index. A project may have a community wheel for one Python version while the default index has none. If no artifact exists, choose a documented source build or a different release rather than forcing an incompatible wheel.
The program fails with an illegal-instruction error
Compare the binary’s required extensions and compiler flags with the CPU profile. Rebuild for the board’s supported ISA, select a conservative target, or use a package built for that baseline. Do not “fix” the message by disabling random optimizations without checking numerical and performance consequences.
The loader or a shared library is missing
Inspect the ELF interpreter and ldd output. Install the matching distribution libraries, correct the runtime search path, or rebuild against the target user space. Copying a loader or library from another distribution can create ABI and symbol-version conflicts.
The container exits with an exec-format error
Inspect the manifest and selected platform. Pull the linux/riscv64 variant explicitly, verify that the host kernel and user space meet the image’s assumptions, and check that the entrypoint itself is a RISC-V executable. If the image runs only under emulation, treat that as a development check rather than native deployment evidence.
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Separate the framework core from the execution provider or device plugin. Verify the board driver, firmware, runtime library, permissions, and container device pass-through, then run a provider-specific sample. A package can be RISC-V compatible while its accelerator integration is not.
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Reproduce with the smallest model and fixed inputs, then test import, model parsing, one CPU operation, and each optimized kernel separately. Capture logs and disable one optimization at a time only to isolate the fault; keep the final configuration tied to a tested model and board.
What should I record before declaring the software compatible?
Create a deployment record containing:
- project, exact version, release date, and source or package URL if one is supplied by the publisher;
- board model, CPU profile, extension list, firmware, kernel, distribution release, and ABI;
- package filename and hash, wheel tag, container image digest, or source commit;
- compiler and linker versions plus target flags for source builds;
- dependency versions, optional modules, execution providers, drivers, and device permissions;
- commands used for architecture, ELF, package, and manifest inspection;
- the model, input shape, precision, batch size, and exact smoke-test result; and
- known limitations, unsupported operators, missing accelerators, and whether any step used emulation.
This record turns “it runs on RISC-V” into a reproducible statement about one release and one tested configuration. Re-run the smoke test after changing the board, distribution, Python version, compiler, model, or accelerator.
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- Pin the exact software release and installation source.
- Confirm
riscv64, word size, ABI, profile, and extensions on the target. - Check distribution repositories and all required dependencies for that release.
- Inspect ELF machine type, interpreter, libraries, and extension requirements.
- Require a
linux/riscv64container manifest when using containers. - Distinguish a published binary or successful build from runtime proof.
- Run a tiny model on CPU, then test each required accelerator or vector path.
- Record hardware, software, commands, logs, and limitations so the result can be reproduced.
Frequently Asked Questions
Is riscv64 the same as RV64GC?
No. riscv64 is commonly a 64-bit Linux architecture label, while RV64GC describes a particular base-and-extension combination. A package tagged riscv64 can still require or omit extensions that your RV64 processor does not implement, so inspect the profile and ISA requirements.
Can QEMU prove that an AI application is compatible with my RISC-V board?
QEMU can help test user-space startup and basic instructions for a selected virtual CPU, but it does not reproduce your board’s memory system, firmware, peripherals, accelerator, thermal limits, or exact kernel behavior. Treat emulated success as an additional development check and confirm the final workload on physical hardware.
What information should I include when reporting a RISC-V compatibility bug?
Include the exact artifact identifier, board and CPU ISA string, ABI, distribution and kernel, package-manager or container commands, complete error output, and a minimal model or input that reproduces the failure. State whether the failure occurs during installation, import, model loading, CPU execution, or an accelerator call.
Why can a container with a RISC-V platform tag still fail on a board?
The tag describes the image architecture, not the host’s kernel interfaces, device permissions, firmware, or accelerator runtime. Check the image’s loader and libraries, required devices, security policy, and entrypoint, then test the same container with the board’s real devices exposed.
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How do CPython wheel tags affect RISC-V installation?
The CPython tag identifies the interpreter ABI, while the platform tag identifies the operating-system and architecture combination. A wheel built for manylinux_2_39_riscv64 and CPython 3.14 will not automatically install on an older interpreter or a user space that fails the manylinux requirements; match both tags and verify dependencies.
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