Goldmont is Intel’s low-power Atom CPU microarchitecture, and it is the processor-core design at the heart of Apollo Lake. Intel describes Goldmont as a three-wide, out-of-order architecture that improves on Silvermont in branch prediction, execution resources and memory handling. Apollo Lake is the broader platform built around Goldmont; its advertised display, media, memory and I/O capabilities are platform-level specifications, not guarantees for every Goldmont processor or finished device.
What is Goldmont?
Goldmont is a CPU microarchitecture in Intel’s Atom family. It defines how processor cores fetch, decode, execute and retire instructions. Intel’s Software Optimization Manual describes it as an out-of-order design: the core can work on independent instructions while earlier ones are waiting, subject to dependencies and available resources.
Goldmont is not another name for Apollo Lake. Goldmont is the core architecture; Apollo Lake is a product platform that uses it. A processor’s full capabilities also depend on its model and the system built around it.
What changed from Silvermont to Goldmont?
Intel’s architecture comparison documents specific changes, rather than a universal performance percentage. The following figures describe core design characteristics in Intel’s Software Optimization Manual, not benchmark results.
| Feature | Silvermont | Goldmont |
|---|---|---|
| Decode and retirement | Goldmont is described as three-wide: up to three instructions decoded and three retired per cycle. The cited manual comparison does not state Silvermont’s corresponding widths. | Up to three instructions decoded per cycle and peak retirement of three per cycle. |
| Out-of-order execution | Baseline generation. | Larger out-of-order execution window and buffers than Silvermont; Intel also describes improvements to branch prediction. |
| Memory execution | One load or one store per cycle in Intel’s comparison. | One load and one store per cycle; Intel describes memory execution and disambiguation as fully out of order. |
| Second-level TLB | Not stated in the cited Goldmont comparison. | Enhanced second-level TLB with 512 entries for 4 KB pages. |
Intel also describes Goldmont’s fetch and decoder branch-prediction path as decoupled, and says the microcode sequencer can allocate three micro-ops per cycle. These are structural descriptions; they do not establish how much faster a particular Goldmont processor will be than a particular Silvermont system. Real-world results depend on the processor model, power limits, cooling, memory and workload.
Is Apollo Lake based on Goldmont?
Yes. Intel identifies Apollo Lake as a platform based on Goldmont and its 14 nm process. Intel’s overview associates the platform with Atom E3900 embedded processors and Celeron and Pentium N-series processors. The architecture is therefore Goldmont, while “Apollo Lake” identifies the broader platform generation.
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What processors use Goldmont?
Intel’s Apollo Lake materials include Atom E3900-family embedded processors and N-series Celeron and Pentium parts. Examples in Intel’s product directory include:
- Intel Pentium N4200: four cores, up to 2.50 GHz, 2 MB cache and 6 W TDP; launched in Q3 2016.
- Intel Celeron N3350: two cores, up to 2.40 GHz, 2 MB cache and 6 W TDP; launched in Q3 2016.
Those specifications belong to the named processor models, not to every Apollo Lake chip. Check the exact processor designation when assessing an older mini PC, embedded board or other system; a product name alone may not establish its configuration.
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- Total Cores is 4 | Total Threads is 8
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What does Apollo Lake add as a platform?
Intel’s overview gives these ranges and maximums for Apollo Lake. They are platform-level summary figures, not specifications for one universal chip; individual processor and system configurations vary.
| Apollo Lake overview item | Intel-listed figure |
|---|---|
| CPU cores | 2–4 |
| Base/HFM frequency | 1.1–1.6 GHz |
| Single-core burst frequency | 1.8–2.5 GHz |
| Cache | 2 MB |
| TDP | 6–12 W |
| Memory | Up to 8 GB LPDDR4 |
| I/O overview | Six USB 3.0 ports and four PCIe ports |
Intel also advertises support for up to three independent 4K displays and up to 15 simultaneous 1080p30 decode streams, alongside hardware acceleration for media encoding and playback. These are vendor-stated platform capabilities, not a promise that any Apollo Lake computer exposes three usable display outputs or handles every media workload as described. Board design, physical connectors, firmware, drivers and workload affect what a finished system supports.
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- Intel Celeron N3350 Dual Core Processor (2.4GHz MAX); 7th-Generation Intel Apollo Lake Platform
- Supports 2x 204-pin DDR3L SODIMM Memory, Maximum 8GB Capcity, 1866MHz Minimum
- Two M.2 for Storage and Expansion; PCIe x1 (2.0)
- Dual Intel Gigabit Ethernet Ports; On-board DC-DC Power Supply; Triple Independent Display
- Form Factor: Thin Mini-ITX, 170mm x 170mm (6.7" x 6.7")
What systems did Intel target?
Intel associates Apollo Lake with embedded and real-time applications, including surveillance, in-vehicle computing, industrial automation, retail and medical systems. The low-power Atom core and platform-level integration were intended for a broad range of compact devices; the actual suitability of a particular device depends on its design and required workload.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.How is Goldmont Plus different?
Goldmont Plus is a later, distinct architecture—not another name for Goldmont and not the architecture Intel identifies with Apollo Lake. In Intel’s manual, Goldmont Plus has four-wide allocation and retirement while retaining a three-wide fetch and decode pipeline. That distinction matters when identifying the generation in a processor specification.
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Sources
- Intel Apollo Lake overview — platform positioning and overview-level capabilities.
- Intel processor product directory — model-specific product information.
- Intel Software Optimization Manual — Goldmont and Goldmont Plus microarchitecture descriptions.
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