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Clear out junk files and repair common Windows errorsFree Scan →Scan for outdated or missing drivers - takes under a minuteDriver Scan →Repair Windows errors before they cause bigger problemsFix Now →TSMC broke ground on its third Phoenix-area fab on April 29, 2025. The facility is planned for N2 and A16 process technologies, with volume production targeted by the end of the decade. It reached a later construction milestone on May 5, 2026, when Phoenix reported its topping-out ceremony.
When did TSMC break ground on its third Arizona fab?
The groundbreaking took place on April 29, 2025, at TSMC’s Phoenix, Arizona site. The U.S. Department of Commerce recorded the milestone in its dated announcement.
What will Fab 3 produce?
TSMC’s Arizona project page identifies the third fab as planned for N2 and A16 process technologies. These are advanced manufacturing processes for semiconductor chips; the announcement does not identify particular chip products or customers. TSMC targets volume production by the end of the decade, rather than giving a specific start date. See TSMC’s Arizona project page.
How far has construction progressed?
On May 5, 2026, the City of Phoenix reported Fab 3’s topping-out ceremony. The city explains that topping out marks installation of the building’s final and highest structural beam. It is a construction milestone, not evidence that production has begun. Phoenix also described the facility as using 2-nanometer process technology. Its announcement is available from the City of Phoenix.
#1 Best Overall
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- Beautiful microchip pattern structure made by the advanced copper technology
- 90~130nm minimum microchip feature Copper Characterization with TEOS or Black Diamond Low-k ILD on the single crystal silicon wafer
- The original value of un-polished wafer is above $500
- No guarantee for research and other applications
How large is TSMC’s Arizona investment?
The three-fab Arizona plan was announced in 2024 with up to $6.6 billion in proposed direct funding under the CHIPS Act and an expectation of approximately 6,000 direct high-tech jobs, according to TSMC’s U.S. expansion announcement. The $6.6 billion figure is proposed public funding, not the project’s total investment. These figures describe the announced three-fab plan; they are not Fab 3-specific funding or job totals.
Why the third fab matters to TSMC
TSMC’s 2025 annual report says construction of a third Arizona facility began in 2025. In the same reporting year, the company shipped 15.0 million 12-inch-equivalent wafers, and advanced technologies accounted for 74% of total wafer revenue. Those are company-wide 2025 figures, not Arizona-fab output or a forecast for Fab 3. The figures appear in TSMC’s annual reports.
Rank #2
- Wafer Pattern May Vary from the Product Images. Great to be used as gift, display object, exhibition, educating demonstration, testing, decoration or your collection
- Beautiful microchip pattern structure made by the advanced copper technology
- 90~130nm minimum microchip feature Copper Characterization with TEOS or Black Diamond Low-k ILD on the single crystal silicon wafer
- The original value of un-polished wafer is above $500
- No guarantee for research and other applications
The company describes its broader manufacturing footprint as six 12-inch GIGAFAB facilities, while also expanding overseas production bases such as Arizona. The facility count and expansion context are on TSMC’s facilities page.
Quick Recap
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- Method: CZ ; Size: 4inch ;
- Type: P-Type ; Dopant: B ; Orientation: 100 ;
- Resistivity:1-10Ω ; Thickness: 525um±25 ;
- Front Side: Polished ; Back Side: Etched ; TTV＜10um；
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Rank #3
- 5 x 5 inches, 0.67 ounces, 0.03 inches thick. Some wafers are marked with alignment marks.
- The pattern is produced by light diffraction, and its reflective appearance changes with the viewing angle.
- Silicon wafers are fragile—please handle with care.
- Circuit details can be examined under a microscope.
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