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An RTL handoff is ready when the receiving synthesis or physical-design team can identify the exact design revision, reproduce the intended implementation, interpret its constraints and IP, review supporting evidence, and close issues through an agreed acceptance process. Sending source files alone is not a complete handoff.
What a ready RTL handoff must prove
Readiness is both a package and a decision. The package must contain the design and the information needed to use it; the decision records that the receiving team has reviewed it and accepted, rejected, or assigned every issue.
- Identity: The top module, parameters, source revision, configuration, and directory structure are unambiguous.
- Reproducibility: Another team can use the supplied scripts and settings to obtain the intended synthesis starting point.
- Interpretability: Clocks, timing assumptions, implementation intent, and embedded IP are documented.
- Evidence: Agreed simulation, lint, timing, and other analysis results are tied to the same revision and tool configuration.
- Acceptance: Review findings, owners, rerun triggers, and closure rules are defined.
Exact file formats, thresholds, and approval gates are determined by the project contract, technology, vendor flow, and whether the recipient receives RTL or a netlist.
RTL handoff artifact checklist
1. Freeze and identify the design
- State the golden RTL revision and release identifier.
- Name the top-level module and record parameter values, build-time options, and required configuration.
- Provide the complete source-file list, including generated or technology-specific sources that the recipient is permitted to use.
- Preserve an organized directory structure and document how it maps to the release.
- Record the configuration-management check that demonstrates the reviewed files are the files being delivered.
NASA/JPL review guidance calls for the design schematics and directory structure to be presented and for configuration management to demonstrate that the correct design was checked. The practical implication is that a commit label or archive name is not enough unless the recipient can identify what it contains.
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2. Include synthesis scripts and settings
- Provide the synthesis scripts used to create the intended implementation.
- Include relevant tool settings, libraries, defines, search paths, and generated-input steps.
- Identify tool versions or approved tool configurations where the project requires reproducibility.
- Explain any manual setup that cannot be encoded in the scripts.
ON Semiconductor’s FPGA-to-ASIC Conversion Reference Manual lists FPGA synthesis scripts among customer deliverables for an RTL handoff. The receiving team should agree whether the scripts are reference material, an executable reproduction flow, or both.
3. Supply constraints and design intent
- Deliver the timing constraints in the format accepted by the receiving flow.
- Describe every clock, generated clock, reset assumption, clock relationship, and operating mode that affects analysis.
- State the intended operating conditions and any assumptions about frequency, uncertainty, input delays, output delays, or false and multicycle paths.
- Identify constraints that are mode-specific and explain how each mode is selected.
The reference manual explicitly includes timing constraints as an RTL handoff deliverable. A constraints file without an explanation of the clocks and operating assumptions can be syntactically valid yet semantically wrong, so format and interpretation should be agreed before transfer.
4. Inventory embedded IP
- List every soft and hard IP block used by the design.
- Identify the supplied source, encrypted deliverable, macro view, model, or vendor package for each item.
- Document parameters, wrappers, clock and reset assumptions, technology dependencies, and licensing or access restrictions.
- Flag IP that is not portable between the source FPGA flow and the target ASIC flow.
ON Semiconductor calls for identification of embedded soft or hard IP and discusses portability concerns when moving between FPGA and ASIC implementations. The recipient must know whether it can resynthesize an IP block, must preserve a hard macro, or needs a replacement.
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5. Attach review evidence
- Include the agreed simulation or functional reports and identify the testbench, tests, and configuration used.
- Include lint, synthesis, timing, CDC, formal, or other analyses required by the project plan.
- Record tool names, versions or configurations, input revision, and report date for each result.
- Separate informational findings from waivers and unresolved defects.
- Maintain an issue log with severity, owner, disposition, and evidence of closure.
NASA/JPL review material calls for design and timing analyses and says unresolved review action items must be satisfactorily addressed before a review closes. Do not present a report as evidence for a different source revision or configuration.
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- Name the sender and receiving owners for RTL, constraints, scripts, IP, reports, and issue closure.
- Specify how questions and defects are raised, tracked, waived, and approved.
- Define which changes require rerunning synthesis, timing, simulation, or other analyses.
- Record the acceptance decision, review date, approvers, and conditions of acceptance.
A practical release layout
The exact directory names are project-specific, but a consistent structure helps the recipient audit completeness. A release commonly separates the following areas:
- rtl/: Golden source, wrappers, and an authoritative source manifest.
- scripts/: Synthesis, setup, configuration, and reproducibility scripts.
- constraints/: Timing files plus clock and operating-mode documentation.
- ip/: IP inventory, permitted deliverables, integration notes, and access instructions.
- verification/: Test configuration and agreed simulation or functional evidence.
- reports/: Lint, synthesis, timing, and other required analyses with tool identity.
- review/: Issue log, waivers, action-close evidence, and approval record.
- README or release manifest: Top module, revision, parameters, prerequisites, known limitations, and a map of the package.
This layout is an organizational pattern, not a mandated vendor format. The receiving team should approve the actual manifest before the release is frozen.
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Review sequence before physical design
1. Specification and requirements review
Confirm that functional, performance, testability, reliability, packaging, and vendor requirements are understood. NASA/JPL emphasizes cross-disciplinary participation because requirements can span more than RTL behavior.
2. Implementation review
Review the RTL structure, source identity, configuration, synthesis setup, constraints, IP inventory, and analysis evidence. The recipient should be able to explain how it will reproduce the implementation and which assumptions require confirmation.
3. Preliminary design review before physical design
Use this gate to confirm that the intended design and constraints have been reviewed and that the receiving team has the required database. Resolve or formally disposition blocking findings before physical implementation starts.
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4. Post-layout critical design review
After place and route, review evidence generated from the physical implementation. NASA/JPL lists design-rule verification, static timing analysis, and logic or functional analysis among post-layout checks and warns that post-layout timing can differ from pre-layout estimates.
5. Build-readiness or release signoff
Complete the project-specific signoff checklist, verify configuration control, and record closure of review actions. NASA/JPL describes this kind of staged review for flight hardware; other programs may use different names or gates.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.RTL handoff versus netlist handoff
ON Semiconductor distinguishes RTL and netlist handoff flows. Select the flow that matches what can legally and technically be shared and what the receiving vendor is contracted to do.
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| Decision point | RTL handoff | Netlist handoff |
|---|---|---|
| Starting material | Golden RTL, scripts, constraints, and IP information | Supplied netlist with the associated implementation data |
| Receiving team’s work | Can resynthesize and adjust implementation choices within the agreed flow | Starts from the delivered netlist; available optimization depends on the flow and supplied views |
| Timing flexibility | Generally greater flexibility to address timing through synthesis or RTL-related implementation choices | More limited if the netlist is fixed or RTL is unavailable |
| Soft-IP integration | Can support integration when the recipient has the required source and permissions | Depends on whether the netlist and all required IP views are complete |
| When it is used | Golden RTL is available, synchronized, and shareable | RTL is unavailable, out of sync, or restricted, or the contract requires a netlist |
The table describes flow-level trade-offs, not universal guarantees. The vendor’s manual, technology requirements, security restrictions, and project contract control the actual package and acceptance criteria.
Common reasons a handoff is rejected
- Revision ambiguity: Reports, scripts, and RTL point to different revisions or configurations.
- Non-reproducible setup: The flow depends on undocumented environment variables, generated files, or manual tool actions.
- Incomplete constraints: Clocks or operating modes are missing, contradictory, or delivered in an unaccepted format.
- Unresolved IP dependency: A macro, encrypted model, license, or technology view is absent or cannot be used by the recipient.
- Evidence without context: Reports omit tool identity, inputs, configuration, or the conditions under which they were produced.
- Open review actions: Findings lack owners, due dates, waivers, or closure evidence.
- Premature timing claims: Pre-layout results are treated as proof of post-layout timing closure.
Final acceptance questions
- Can the recipient identify the exact golden revision and top-level configuration?
- Can it reproduce the intended synthesis setup from the supplied scripts and prerequisites?
- Are clocks, constraints, operating modes, and implementation assumptions understood and accepted?
- Is every embedded soft or hard IP block identified, available, and technically compatible with the target flow?
- Are analysis reports tied to the delivered revision and configuration?
- Does the issue log show that blocking findings are closed or formally waived?
- Does the contract define who approves the handoff and what changes trigger reruns?
The Bottom Line
RTL is ready for handoff when the receiving team can reproduce and interpret the intended design, verify its evidence, and accept the package under documented project rules. The files matter, but revision control, constraints, IP disclosure, review closure, and post-layout signoff determine whether the handoff is actually usable.
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