The Tool Desk
Outbyte PC Repair FREEClear out junk files and repair common Windows errorsFree Scan →Outbyte Driver Updater FREEScan for outdated or missing drivers - takes under a minuteDriver Scan →RISC-V’s presence at Embedded World 2026 centered on a practical question: how does an open instruction-set architecture move from promise to products and production engineering? At the March 10–12 event in Nuremberg, RISC-V International and its pavilion partners highlighted a reported shipping smartwatch, automotive and safety-related processor work, edge-AI demonstrations, and tools for monitoring RISC-V-based systems. These were vendor and organizer-reported examples, not independent performance tests.
What happened at Embedded World 2026?
Embedded World Exhibition&Conference ran March 10–12, 2026, at NürnbergMesse in Nuremberg. The event has passed. The organizer reported 1,262 exhibitors from 43 countries, spread across seven halls and 34,069 square meters of net exhibition space (organizer’s March 9, 2026 press release).
The Linux Foundation’s event listing places the RISC-V booth at Hall 5, Stand 5-119. RISC-V International listed eight pavilion co-exhibitors: Akeana, Andes Technology, DAMO/XuanTie, Nuclei Systems, Semidynamics, Siemens EDA, SiFive, and Tenstorrent (RISC-V International’s event coverage).
What did RISC-V show?
The examples spanned several different stages and engineering needs. They should not be read as a like-for-like product comparison: the cited coverage provides no common benchmarks for performance, power, or cost.
#1 Best Overall
- Flexible MCU Board: Incorporate the ESP32-C3 32-bit RISC-V chip, operating up to 160 MHz, mounted multiple development ports,
- Developer Friendly: Compatible with Arduino IDE, MicroPython, CircuitPython, PlatformIO, ESP IDF, Zephyr, Matter, ESPNow, Meshtastic, WLED, ESPHome, Home Assistant, Ubidots
- Outstanding RF performance: Complete Wi-Fi functions and Bluetooth Low Energy, while supporting communication over 100m with anFL antenna
- Elaborate Power Design: 4 working modes as low as 44 μA in deep sleep mode, while supporting lithium battery charge management
- Thumb-sized Design: 21 x 17.5mm, Seeed Studio XIAO series classic form factor
| Example | Target or engineering focus | What was reported | Evidence and maturity |
|---|---|---|---|
| Amazfit T-Rex 3 Pro with AndesCore D25F | Wearable product using a low-power processor core | RISC-V International reported that more than one million units had shipped globally. | Reported as a shipping product by RISC-V International; the shipment figure is not independently verified in the cited coverage. |
| Andes processor portfolio | MCU-class control, SIMD/DSP extensions, vector-enabled multicore processing, and automotive safety enhancements | Presented as a range of IP options for embedded and automotive applications. | Portfolio description from RISC-V International; no shared performance or certification data is given there. |
| Semidynamics Cervell NPU | AI inference at the edge | RISC-V International reported a demonstration of the NPU alongside inference tools. | Company demonstration as reported by RISC-V International, not a comparative benchmark. |
| SiFive X160 | TinyML workloads | RISC-V International reported a processor demonstration running TinyML workloads. | Demonstration as reported by RISC-V International; no workload-level results or benchmark methodology is provided. |
| Tenstorrent embedded IP | Small language-model inference | RISC-V International reported a TinyLlama demonstration. | Demonstration as reported by RISC-V International; no comparative results are provided. |
| Siemens EDA Tessent Embedded Analytics | Functional monitoring of RISC-V-based SoCs | Siemens described demonstrations and short pavilion talks on monitoring and debugging. | Vendor-described demonstration; the cited page does not establish independent test results. |
The reported examples suggest a broadening of the event discussion: not just what the architecture permits, but how implementations fit control workloads, safety and lifecycle needs, AI inference, and software and debugging workflows. The sources do not establish that every demonstration is production-ready or commercially available.
Is RISC-V ready for production?
Embedded World 2026 offered evidence of both a reported deployed product and engineering demonstrations, but those are different levels of proof. RISC-V International said the Amazfit T-Rex 3 Pro uses AndesCore D25F and reported shipments above one million units globally. That is a meaningful deployment example, but the shipment figure is the organization’s claim rather than an independently verified sales statistic.
Rank #2
- CH32V003 Development Minimum System Board for Nano RISC-V CH32V003F4U6 Chip TYPE-C USB 22Pin
- on-board 24MHz Crystal oscillator
- Power by TYPE-C USB
Other examples were described as demonstrations or portfolio capabilities. A demo can show that a configuration runs a workload; by itself, it does not establish production qualification, long-term support, or suitability for a particular device. For an embedded design, the relevant evaluation depends on the application:
- Control and MCU workloads: check the core’s fit for the required real-time behavior, peripheral integration, power budget, and software support.
- Automotive or other safety-related systems: establish the applicable safety process, evidence, tool qualification needs, lifecycle support, and integration responsibilities. A general mention of safety enhancements is not proof of compliance for a specific system.
- Edge AI: test the exact model and toolchain on the intended hardware, including memory, latency, power, and deployment constraints. The event descriptions do not supply comparable measurements.
- Production engineering: assess compatibility, debugging and monitoring, supplier support, and the maturity of the software and verification flow alongside the instruction set.
RISC-V International framed compatibility, scalability, and production use as increasingly prominent topics at the event. That is an account of the event’s discussion, not an independent verdict that all RISC-V implementations are interchangeable or production-ready.
Rank #3
- The ESP32-C3 SUPERMINI is positioned as a high-performance, low-power, cost-effective IoT mini development board, suitable for low-power IoT applications and wireless wearable applications
- It is equipped with a rich set of interfaces, including 11 digital I/Os that can be used as PWM pins and 4 analog I/Os that can be used as ADC pins.
- It supports four serial interfaces, including UART, I2C, and SPI.
- The ESP32-C3 features a 32-bit RISC-V CPU, including an FPU (Floating Point Unit) capable of 32-bit single-precision
- Package: 2PCS ESP32-C3 MINI Development Board ESP32 SuperMini ESP32 C3 WiFi Module
Why were automotive safety and edge AI prominent?
Automotive systems combine long product lifecycles and stringent safety engineering with increasing compute demands. RISC-V International described Andes’ MCU-class cores, SIMD/DSP extensions, vector-enabled multicore processors, and automotive safety enhancements, and announced a panel involving Quintauris, Infineon, SiFive, Siemens EDA, and Vector. Its article also said annual RISC-V core shipments were “now approaching 2.5 billion”; this is the article’s attributed figure, not an independently verified market count.
Edge AI was represented through distinct approaches rather than one common platform: Semidynamics’ Cervell NPU and inference tools, SiFive’s X160 running TinyML workloads, and Tenstorrent’s TinyLlama demonstration on embedded IP. These examples indicate interest in running inference closer to devices, but the coverage supplies no common model, hardware conditions, or test results with which to compare them.
Rank #4
- ESP32-C6 WiFi 6 microcontroller development board adopts ESP32-C6-WROOM-1-N8 module, which is equipped with RISC-V 32-bit single-core processor, up to 160MHz main frequency, built-in 8MB Flash
- Integrates WiFi 6, Bluetooth 5 and and IEEE 802.15.4 (Zigbee 3.0 and Thread) wireless communication, with superior RF performance
- Integrates rich peripherals including SPI, UART, I2C, I2S, LED PWM, SDIO and other interfaces, compatible with the pinout of ESP32-C6-DevKitC-1-N8 development board, more convenient to use and expand a variety of peripheral modules
- Onboard CH343 and CH334 USB HUB chips, supports USB and UART development at the same time via a USB-C port
- Comes with online examples and tutorials for ESP-IDF development environment
Where was the RISC-V pavilion, and what sessions were listed?
The pavilion was at Hall 5, Stand 5-119 at NürnbergMesse. The official conference schedule listed “Building your future Embedded product roadmap on RISC-V” on March 10 at Hall 5, booth 5-210, with participants from Siemens, Andes, Semidynamics, and SiFive (event conference program). Siemens also listed the session on its Embedded World page. The two official pages give conflicting start times, so no time is stated here.
Siemens separately described demonstrations of Tessent Embedded Analytics for functional monitoring of RISC-V-based SoCs, along with short talks on monitoring and debugging. That material points to an important part of production engineering beyond processor design: observing system behavior and diagnosing problems in the finished SoC.
Quick Recap
Best Value
- Ample PSRAM Storage – The development board offers 8MB PSRAM, providing substantial extra memory for handling more complex tasks, large data buffers, and advanced processing.
- Enhanced Multi-Tasking Capability – With the additional 8MB PSRAM, the ESP32-C5-WIFI6-KIT can efficiently manage multiple protocol stacks simultaneously, ensuring smooth operation in multi-tasking IoT environments.
- Support for Medium-Load Applications – The 8MB PSRAM allows the ESP32-C5 to handle medium-load applications more effectively, making it ideal for scenarios requiring real-time data processing or continuous communication.
- Seamless Performance – The increased memory improves the overall performance and responsiveness of the device, particularly when running applications with larger memory footprints or more demanding computations.
- Future-Proof for Complex Projects – With 8MB of PSRAM, developers are better equipped to build scalable, high-performance solutions that support both current and future IoT use cases, offering flexibility for future-proofing designs.
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