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Renesas announced RXv3 on October 25, 2018 as the third generation of its 32-bit RX CPU core. It adds a superscalar pipeline, optional register-bank saves and optional double-precision floating-point instructions while retaining binary compatibility with RXv1 and RXv2. The core first appeared in the RX66T family and later powered MCUs including the RX671.
What is the RXv3 CPU core?
RXv3 is a CPU core used in Renesas’ RX microcontroller (MCU) family. Renesas introduced it for embedded applications such as real-time motor control and industrial systems, including smart-factory, smart-home and smart-infrastructure products. The company announced the core on October 25, 2018, saying RXv3-based MCUs would begin rolling out by the end of that year.
The core remains primarily a CISC architecture. Renesas associates that approach with compact code and smaller flash requirements, while the RXv3 pipeline is designed to provide instruction throughput comparable to RISC. The RX architecture manual describes a 4-Gbyte linear address space and sixteen 32-bit general-purpose registers. Short instruction formats help keep frequently used operations compact.
What changed from RXv2, and why does it matter?
Enhanced five-stage superscalar pipeline
RXv3 adds an enhanced five-stage superscalar pipeline. The design aims to increase the amount of instruction work the core can process while preserving the RX family’s compact-code characteristics. For firmware developers, the practical performance still depends on the MCU’s clock rate, memory system, code, and workload; a core benchmark alone does not predict application speed.
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- COMPATIBILITY: Supports multiple Renesas microcontroller families including RH850, RL78, and RX series for debugging and programming
- FUNCTIONALITY: Serves as an in-circuit debugger, emulator, and programmer for efficient embedded system development
- DEVELOPMENT TOOL: Professional-grade debugging capabilities for real-time code analysis and system optimization
- INTERFACE OPTIONS: Provides comprehensive debugging and programming interface for embedded system development
- VERSATILE APPLICATION: Ideal for firmware development, testing, and system programming across Renesas microcontroller platforms
Optional register-bank saves
RXv3 can use register-bank save functions, with Renesas’ 2018 announcement describing up to 256 banks. The feature is intended to reduce the work needed to preserve processor state during interrupts and RTOS context switches. Renesas reports that using register-bank saves can reduce RTOS context-switch time by up to 20 percent; that is a vendor-reported maximum, not a guarantee for every RTOS, MCU configuration, or workload.
Optional double-precision floating point
Some RXv3 implementations provide double-precision floating-point instructions. They may be useful when control algorithms, numerical calculations, or model-based development need greater precision than single-precision operations provide. The feature is optional, so verify its presence in the specific MCU’s documentation rather than assuming every RXv3 part includes it.
How fast is RXv3?
Renesas reported up to 5.8 CoreMark/MHz for RXv3 in its October 2018 announcement, based on the EEMBC CoreMark benchmark. A 2019 Renesas white paper gives the figure as 5.82 CoreMark/MHz. Both are vendor-reported results; they describe normalized benchmark performance per megahertz, not a guaranteed score for every RXv3 MCU or a measure of a complete application.
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- BROAD MCU COMPATIBILITY: Designed for use with ARM, Cortex, Microchip PIC32, and Renesas RX MCUs for versatile embedded development.
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Actual performance depends on the particular chip and its clock, memory access, compiler and build settings, peripheral activity, and workload. When comparing MCUs, look at the benchmark conditions as well as the headline score. Also compare frequency and memory configuration rather than treating CoreMark/MHz as the whole performance story.
Which RX MCUs use RXv3?
The RX66T was the first RXv3 MCU group, announced on November 27, 2018. Renesas positioned it for inverter and motor-control systems and claimed up to 2.5 times the performance of previous RX family MCUs. That comparison is Renesas’ claim; the announcement does not make it a universal speedup for every program or every previous RX part.
The RX671, announced September 8, 2021, is another RXv3 family. Its published specifications include a 120 MHz RXv3 core, 60 MHz flash reads, a CoreMark score of 707, and 48.8 CoreMark/mA. Renesas also highlighted touch, voice-recognition and security functions, alongside multiple package options.
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| RX MCU family | RXv3 details reported by Renesas | Positioning and notable features |
|---|---|---|
| RX66T | First RXv3 MCU group; announced November 27, 2018 | Inverter and motor-control applications; Renesas claimed up to 2.5 times the performance of previous RX family MCUs. |
| RX671 | 120 MHz core; 60 MHz flash reads; CoreMark 707; 48.8 CoreMark/mA | Announced September 8, 2021; touch, voice-recognition and security functions, with multiple package options. |
These examples establish that RXv3 spans more than one MCU family, but they are not interchangeable parts. Choose by the complete device specification: clock and memory, required peripherals, motor-control integration, security and safety requirements, package and pin count, and power budget.
Is RXv3 backward compatible?
Renesas says RXv3 is backward compatible with RXv2 and RXv1 CPU cores, and that binary compatibility allows applications written for earlier cores to carry forward to RXv3 MCUs. This is valuable when evaluating a core migration because it can preserve existing CPU-level software.
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CPU binary compatibility does not establish that two different MCU models have identical peripherals, pinouts, memory capacities, startup requirements, or electrical behavior. Before moving a product, check the target MCU’s hardware manual and package, rebuild and test the firmware as appropriate, and verify peripheral drivers, timing, interrupt behavior, and device-specific configuration.
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- POWERFUL PERFORMANCE IN NANO FORM FACTOR – Built on the robust Renesas RA4M1 microcontroller with 256KB flash, 32KB RAM, and a 48MHz clock speed for advanced embedded applications.
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How should developers evaluate an RXv3 MCU?
Start with the application rather than the core label. The RXv3 features that matter most depend on what the firmware must do and on the specific MCU implementation.
- Performance: Compare clock frequency and benchmark results, then measure the actual application on the target device.
- Real-time behavior: Check interrupt requirements and whether the part supports the register-bank save function; assess context-switch performance with the intended RTOS and configuration.
- Power: Use the MCU’s power specifications and application measurements. For the RX671, Renesas reports 48.8 CoreMark/mA, but that benchmark-derived figure is not a substitute for a workload-specific power assessment.
- Memory and code size: Confirm flash and SRAM capacity, and assess whether the architecture’s compact instruction formats help meet the application’s memory budget.
- Numerical work: If double precision is important, verify that the selected MCU implements RXv3’s optional double-precision instructions and check software support.
- Integration: Compare peripheral and motor-control functions, functional-safety and security features, and the package and pin-count options required by the design.
- Software migration: Treat RXv1/RXv2 binary compatibility as a useful CPU-level property, then confirm device-specific hardware and software differences.
What development board is appropriate for RXv3?
For RX671 evaluation, Renesas names two directly relevant physical products: the Target Board for RX671 and the Renesas Starter Kit+ for RX671. The right choice depends on the evaluation setup and the required hardware; check the board documentation and included facilities before selecting one. Current stock and regional availability are not established here, so confirm them with Renesas or an authorized distributor before ordering.
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