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Lattice Semiconductor announced its MachXO5-NX TDQ family on October 13, 2025, positioning it as a secure-control FPGA family with post-quantum cryptography (PQC) support. Its purpose is to add hardware-backed security functions—such as protected FPGA configuration, cryptographic identity and attestation—to systems including AI-server motherboards, secure control modules, host processor modules and network interface cards. It is one component of a broader security design, not a way to make an entire data center quantum-proof by itself.

What is the MachXO5-NX TDQ family?

MachXO5-NX TDQ is a family of secure-control field-programmable gate arrays (FPGAs) built on Lattice’s Nexus platform. A control FPGA can handle system-level functions alongside a server’s main processor, including board control and security tasks. The TDQ designation identifies the family Lattice announced with its post-quantum security feature set; the company also referred to MachXO5-NX TD devices in its announcement.

Lattice called TDQ the industry’s first secure-control FPGA family with full Commercial National Security Algorithm (CNSA) 2.0-compliant PQC support. That is the company’s positioning, not an independently established industry-wide ranking in the information available here. The announcement targets computing, communications, industrial and automotive uses, with data-center servers among the relevant computing applications.

What security does it add?

The family combines cryptographic algorithms with mechanisms to protect the FPGA’s configuration and manage its identity and keys. The algorithm list Lattice gives includes signature algorithms, key establishment, authenticated encryption and hash functions:

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Lattice describes the suite as CNSA 2.0- and NIST-approved. The individual algorithms have different jobs: signatures can support authenticity checks, key establishment helps parties agree on cryptographic secrets, and encryption can protect data. The algorithm list alone does not establish which functions are enabled in a particular system or how that system is configured.

Configuration protection and update controls

MachXO5-NX TDQ supports authenticated and/or encrypted bitstreams—the configuration data used to program an FPGA. Authentication helps a device verify that a bitstream is valid; encryption can protect its contents. Lattice also describes secure bitstream key management, revocable root keys and a key hierarchy. Revocability and key hierarchy provide mechanisms for managing trust and keys, but their security depends on system design, implementation and operational practice.

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The family’s crypto-agility is intended to allow algorithms to be updated in the field, with anti-rollback version protection. That matters because cryptographic requirements can change over a product’s lifetime: updateability can make it possible to adopt a new supported algorithm, while anti-rollback protection is intended to prevent reverting to an older version. It does not mean every algorithm can be changed without a compatible firmware, software or system update.

Identity, attestation and lifecycle support

Lattice lists support for DICE, SPDM and its SupplyGuard offering in connection with attestation and lifecycle or supply-chain management. Attestation is a way for a system to present evidence about its identity or state so another component can make a trust decision. These capabilities can contribute to a chain of trust, but they are not a substitute for server firmware security, access controls, monitoring or the operator’s broader supply-chain processes.

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How could it be used in a data center?

Independent engineering coverage identifies several possible placements: AI-server motherboards, secure control modules (SCMs), host processor modules (HPMs) and network interface cards (NICs). In those roles, a secure-control FPGA can provide control or security functions close to the hardware—for example, protecting its own configuration and participating in a platform’s authentication or attestation design. The exact functions assigned to it depend on the server or board implementation.

Electronic Design reported that the first MachXO5-NX device has up to 55,000 logic cells and that Lattice planned to scale the family to 96,000 logic cells. The 96,000 figure was a planned family expansion, not a stated capacity for every device. Logic-cell count indicates programmable logic scale; it does not by itself show performance, power use, I/O capacity or suitability for a particular server design. No benchmark, power-savings result or attack-prevention figure is established here.

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What does “CNSA 2.0-compliant” mean for an FPGA?

CNSA 2.0 is a cryptographic algorithm suite associated with U.S. national-security systems. In this context, Lattice is saying that the FPGA family supports the algorithms it identifies for CNSA 2.0, including post-quantum options. The claim concerns cryptographic capabilities in the component; it is not a statement that an entire server, data center or deployment has been certified as CNSA 2.0-compliant.

For a buyer, the practical question is whether the FPGA’s capabilities match the requirements of the full platform and its operating environment. That requires checking the actual device and software configuration, supported algorithms and update path, key provisioning, system integration, and any applicable procurement or compliance requirements. The announcement does not provide a complete system-level certification or independent test result.

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Availability and the newer Mach-N2 family

In its October 13, 2025 announcement, Lattice said MachXO5-NX TDQ and TD devices were available and had shipped to industry-leading communications and compute customers. It also said they were supported by the latest Lattice Radiant design-software release at that time. This establishes availability as reported in that announcement; it does not specify current inventory, regional distribution, pricing or the exact Radiant version.

There is also a newer Lattice secure-control family to consider. On September 16, 2026, Lattice announced Mach-N2, combining integrated flash, hardware Root of Trust, CNSA 2.0-compliant PQC and crypto-agility. Lattice said the Mach-N2 and AMI firmware/manageability combination targets cloud and AI data-center infrastructure. The announcement describes a newer option, but the information available here does not provide a like-for-like specification comparison with MachXO5-NX TDQ.

Can you buy MachXO5-NX TDQ on Amazon?

No Amazon listing for the exact MachXO5-NX TDQ device, a matching evaluation board or an authorized compatible accessory is established in the available product information. This is specialized business-to-business silicon rather than a typical consumer component. Buyers evaluating it should seek current availability and design-support details from Lattice or an authorized distributor; the existence of a suitable evaluation board or sales channel is not established here.

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Product prices and availability are accurate as of the date/time indicated and are subject to change. Any price and availability information displayed on Amazon at the time of purchase will apply.

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