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1Repair Windows errors before they cause bigger problems2Fix the driver behind crashes, sound loss and screen glitches3Clear out junk files and repair common Windows errorsYes—but the headline refers to two different developments, not one newly announced processor. In 2006, Tehran-based Parsé Semiconductor developed Aristo, a 32-bit core compatible with SPARC, and incorporated it into the Tachra chip. A report on Iran’s 1404 microelectronics program, published by Tasnim on April 8, 2026, separately claims a fabless, native 32-bit microcontroller with an open architecture for industrial use. Tasnim did not name that microcontroller or identify its instruction set, so it cannot be confirmed as SPARC, RISC-V, or a successor to Aristo.
What Iran’s 32-bit processor reports describe
The best-documented historical effort is Parsé Semiconductor’s Aristo family. In a report dated July 26, 2006, EDN attributed to the Fars News Agency the claim that Iran had designed and produced a 32-bit microprocessor for the first time. EDN identified Parsé, based in Tehran, as the developer and described Aristo as a SPARC-compatible core.
The newer claim is different in date and detail. Tasnim’s April 8, 2026 account of Iran’s 1404 microelectronics program says the program achieved the design and fabless construction of a native 32-bit microcontroller with an open architecture and industrial application. The report does not provide a model name or enough technical detail to establish how it relates to Aristo.
Aristo, Tiny and Tachra: the 2006 effort
Aristo was a SPARC-compatible core
EDN described Aristo as a SPARC V8 core intended for system-on-chip designs. The report said Parsé declared it fully functional after fabrication in Taiwan Semiconductor Manufacturing Co.’s 0.18-micron process. That is evidence of reported silicon validation at TSMC; it is not evidence that Iran had a domestic high-volume wafer fab.
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- Equipped with high-performance Xtensa 32-bit LX7 dual-core processor, up to 240MHz main frequency
- Supports 2.4GHz Wi-Fi (802.11 b/g/n) and Bluetooth 5 (LE), with onboard antenna Built-in 512KB SRAM and 384KB ROM, with onboard 16MB Flash and 8MB PSRAM
- Onboard 2.8inch LCD display, 240×320 resolution, 262K color Optional for capacitive touch function controlled via I2C interface, 5-point touch, with interrupt support
- Adapting UART, I2C and some IO interfaces, integrates full-speed USB port Onboard speaker, QMI8658 6-axis sensor, RTC sensor, TF card slot and battery recharge management module, etc.
- Supports accurate control such as flexible clock and multiple power modes to realize low power consumption in different scenarios
Tiny and Tachra served different roles
EDN also described Tiny as a SPARC V8 core, aimed at FPGA and fast ASIC implementations where cache or peripherals might not be needed. Tachra was a chip incorporating the Aristo core, and Parsé supplied development tools for it.
EDN listed potential uses including communications, automated manufacturing, industrial automation, robotics, AI and data-transfer networks. It cautioned that performance was likely modest compared with contemporary Western microprocessors and reported no benchmarks. A Roshd archive lists a 150 MHz operating frequency and applications including telecommunications, automotive, industrial automation, robotics, AI, networking and information transfer. Treat that frequency as an archival claim, not as a benchmark or a measure of performance against modern processors.
Rank #2
- Equipped with ESP32-S3R8 Xtensa 32-bit LX7 dual-core processor, up to 240MHz main frequency. Supports 2.4GHz Wi-Fi (802.11 b/g/n) and Bluetooth 5 (LE), with onboard antenna. Built in 512KB of SRAM and 384KB ROM, with onboard 8MB PSRAM and an external 16MB Flash memory
- Type-C connector, improving device compatibility, easier to use. Onboard 1.8inch AMOLED display for clear color picture display, 368 × 448 resolution, 16.7M color. Built-in SH8601 display driver and FT3168 capacitive touch chip, using QSPI and I2C communication respectively, effectively saving the IO resources
- Onboard 1.8inch AMOLED display for clear color picture display, 368 × 448 resolution, 16.7M color. Built-in SH8601 display driver and FT3168 capacitive touch chip, using QSPI and I2C communication respectively, effectively saving the IO resources
- Onboard QMI8658 6-axis IMU (3-axis accelerometer and 3-axis gyroscope) for detecting motion gesture, counting steps, etc.. Onboard PCF85063 RTC chip, powered by main Lithium battery through AXP2101 chip, with reserved RTC battery pads for connecting a backup battery, ensuring RTC function during the replacement of the main battery. Onboard PWR and BOOT programmable buttons for easy custom function development
- Onboard 3.7V MX1.25 Lithium battery recharge/discharge header, optional for 3.7V Lithium battery. Reserved pads of 7 × GPIO, 1 × I2C, 1 × UART, and 1 × USB interface, for connecting peripherals and debugging. Onboard TF card slot for extended storage and fast data transfer, suitable for applications such as data recording and media playback, simplifying circuit design
What the 2026 microcontroller report establishes
Tasnim’s report describes a program-level achievement, not a named retail product. It calls the microcontroller native, 32-bit, fabless and based on an open architecture, with an industrial application. It does not publish a model, ISA revision, clock speed, benchmark results or evidence that the device is commercially available.
The same report says three public calls involved nearly 100 professors and students, more than 40 designs were selected for prototype fabrication, and services reached more than 10 companies and research centers. It also says access was provided to five international foundries using 28–180 nm technologies. These are figures about the wider program; they do not identify which design became the unnamed microcontroller or establish that it entered production.
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- ESP32-S3-Touch-LCD-4.3 is a microcontroller development board with 2.4GHz W-i-F-i and BLE 5 support, and integrates high-capacity Flash and PSRAM.
- Onboard 4.3inch capacitive touch display, 800×480 resolution, 65K color, can smoothly run GUI programs such as LVGL.
- Combined with various peripheral interfaces, suitable for the quick development of the HMI and other ESP32-S3 applications.
- Onboard CAN, RS485, I2C interface, and TF card slot, integrate full-speed USB port.
- Supports flexible clock, module power supply independent setting, and other controls to realize low power consumption in different scenarios.
Aristo and the newer MCU are not interchangeable claims
| Comparison | Aristo and Tachra | Unnamed 2026 microcontroller |
|---|---|---|
| Year and source | EDN report dated July 26, 2006, attributing the first-design-and-production claim to Fars News Agency. | Tasnim report dated April 8, 2026, summarizing Iran’s 1404 program. |
| Architecture disclosed | EDN identifies Aristo and Tiny as SPARC V8 cores; Tachra incorporates Aristo. | Tasnim says “open architecture” but does not name the ISA or revision. |
| Fabrication model | EDN reported Aristo functional after fabrication at TSMC in a 0.18-micron process. | Tasnim characterizes the MCU work as fabless and reports program access to five international foundries at 28–180 nm; it does not name the MCU’s fabrication process. |
| Applications stated | Communications, manufacturing and industrial automation, robotics, AI, networking and information transfer, according to EDN and the Roshd archive. | Industrial use, according to Tasnim; specific sectors are not stated. |
| Published technical data | Roshd archive lists 150 MHz; EDN reported no benchmarks. | Clock speed and benchmark results are not stated in Tasnim’s report. |
| Commercial availability | Not stated in the cited EDN and Roshd accounts. | Not stated in Tasnim’s report. |
Is the newer chip RISC-V?
The available program report does not say. “Open architecture” alone is not enough to identify a processor as RISC-V, and it does not establish a connection to the older SPARC-compatible Aristo.
Iranian RISC-V research does exist separately. The Iran University of Science and Technology Electronics Research Center describes phoeniX as an open-source RV32IEM core written in Verilog and based on the 32-bit RISC-V ISA V2.2. Its page lists publications at the 2024 Iranian International Conference on Microelectronics and a January 2025 update. That is evidence of academic RISC-V work, but not evidence that phoeniX is the unnamed industrial microcontroller reported by Tasnim.
Rank #4
- Equipped with high-performance Xtensa 32-bit LX7 dual-core processor, up to 240MHz main frequency
- Supports 2.4GHz Wi-Fi (802.81 b/g/n) and Bluetooth 5 (LE), with onboard antenna Built-in 512KB SRAM and 384KB ROM, with onboard 16MB Flash and 8MB PSRAM
- Onboard 2.8inch LCD display, 480×480 resolution Supports touch control via I2C interface, with interrupt support (for touch version only)
- Adapting UART, I2C and some IO interfaces, integrates full-speed USB port Onboard QMI8658 6-axis sensor, RTC sensor, TF card slot and battery recharge management module, etc.
- Supports accurate control such as flexible clock and multiple power modes to realize low power consumption in different scenarios
Can you buy the Iranian microcontroller?
The cited reports do not establish retail availability for either the unnamed MCU or the historical Aristo/Tachra chip. Tasnim reports prototype selection and foundry access at the program level, not a product listing, order channel or production status for the microcontroller. Without a model name or availability notice, there is not enough information to identify a board or chip for purchase.
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