TSMC, Intel, and Samsung are all advancing leading-edge chip manufacturing, but they are not interchangeable suppliers—and their process names do not provide a fair, direct ranking. TSMC is a pure-play foundry; Intel makes its own chips while building an external foundry business; Samsung offers foundry services within a wider semiconductor operation. Company disclosures report TSMC N2 and Intel 18A entering high-volume manufacturing in late 2025, while Samsung lists SF2 mass production as starting in 2025. Those milestones do not establish equal yields, capacity, cost, or commercial maturity.
How the three manufacturers differ
The first distinction is what each company’s manufacturing business is designed to serve. It affects who can become a customer, how the company balances internal and external demand, and what evidence is available for judging its scale.
| Company | Manufacturing model | What that means for customers |
|---|---|---|
| TSMC | Pure-play foundry focused on manufacturing products designed by customers. | Its business is centered on external customers and their chip designs. |
| Intel | Integrated manufacturer that makes its own products and is developing foundry services for external customers. | External foundry customers are an important part of its expansion strategy, alongside Intel’s internal product needs. |
| Samsung | Foundry services are one part of Samsung Electronics’ semiconductor business, alongside Memory and System LSI. | Customers can consider foundry services within a company that also operates in memory and other semiconductor markets. |
TSMC’s 2025 annual report provides a scale baseline for its own operation: it says the company manufactured 12,682 products for 534 customers using 305 distinct technologies, shipped 15.0 million 12-inch-equivalent wafers, and had annual managed capacity above 17 million 12-inch-equivalent wafers at facilities managed by TSMC and subsidiaries. It also reports that technologies it defines as 7nm and more advanced represented 74% of total wafer revenue in 2025. These are TSMC’s figures and definitions; the company disclosures compared here do not provide consistently defined equivalent figures for Intel and Samsung.
What is the reported status of N2, 18A, and SF2?
The latest milestones described in the cited company materials are close in timing, but they use different terms and are not a shared measure of manufacturing performance.
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| Company and process | Company-reported status | What to keep in mind |
|---|---|---|
| TSMC N2 | TSMC’s 2025 annual report says N2 entered high-volume manufacturing in the fourth quarter of 2025; the report expected a fast ramp in 2026. | The 2026 ramp is an expectation in that report, not a like-for-like measure of output or yield against competitors. |
| Intel 18A | Intel’s 2025 Form 10-K says 18A first entered high-volume manufacturing in late 2025. Intel identifies it as the process used for its first Core Ultra Series 3 processor. | Intel describes 18A as its most advanced leading-edge node at that time and as a step toward attracting external foundry customers. |
| Samsung SF2 | Samsung’s current official logic-node page lists SF2 mass production as starting in 2025. | The stated start date establishes Samsung’s published schedule, not comparative customer volume, yield, or maturity. |
“High-volume manufacturing” and “mass production” are company-reported status descriptions. They do not by themselves show how many wafers each supplier can allocate to a particular customer, how quickly a design can ramp, or what percentage of wafers meet specifications. Those comparisons require consistent, comparable data that the cited company disclosures do not provide.
Why the node names are not a ranking
N2, 18A, and SF2 are company process labels, not measurements on one shared physical-size scale. A smaller-looking number or a different naming convention cannot establish that one process has higher transistor density, better power efficiency, lower cost, or superior yield than another.
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A more useful comparison asks what each supplier discloses about transistor structure, power delivery, process status, design support, and packaging—and then evaluates those details against the requirements of a particular chip. The cited sources do not establish an independent, common-benchmark ranking of these three nodes for density, yield, cost, or power-performance.
Transistors and power delivery: what each company says
| Process or roadmap | Disclosed technology | How to interpret it |
|---|---|---|
| Intel 18A | RibbonFET gate-all-around transistors and PowerVia backside power delivery. | Intel presents both as features of 18A; their presence alone does not quantify a product-level advantage over another supplier’s process. |
| Samsung SF2 | Second-generation MBCFET gate-all-around technology. | Samsung identifies SF2’s transistor approach and lists mobile, HPC, AI, and automotive as target application areas. |
| TSMC N2 and later roadmap | N2 uses a nanosheet approach. TSMC describes A16 as combining nanosheet transistors with Super Power Rail backside power delivery. | A16’s power-delivery approach is a roadmap feature; it should not be confused with N2’s reported 2025 production milestone. |
These architecture descriptions explain what the companies say they are building, not which foundry wins a design. A real chip’s power, performance, and area depend on its design, process implementation, libraries, and operating conditions. No common test result in the cited materials settles that comparison.
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Roadmaps: distinguish targets from production
TSMC
TSMC’s 2025 annual report scheduled N2P and A16 volume production for the second half of 2026 and A14 for 2028. It describes N2P as an extension of N2, and says A16 is aimed at HPC products with complex signal routes and dense power-delivery networks. These are schedules and positioning stated in the report, not confirmation that every target has been achieved.
Intel
Intel describes 14A as its next-generation process, in development and designed from the outset for external customers. Its 2025 Form 10-K says Intel may pause or discontinue 14A and successor leading-edge development if it cannot secure a significant external 14A customer. That is a stated business risk tied to customer demand, not a prediction that 14A will fail.
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- Pure gaming performance with smooth 100+ FPS in the world's most popular games
- 6 Cores and 12 processing threads, based on AMD "Zen 5" architecture
- 5.4 GHz Max Boost, unlocked for overclocking, 38 MB cache, DDR5-5600 support
- For the state-of-the-art Socket AM5 platform, can support PCIe 5.0 on select motherboards
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Samsung
Samsung’s current process page identifies SF2’s 2025 mass-production start and its intended application areas. The cited current page does not establish a directly comparable future production schedule against TSMC’s and Intel’s disclosed roadmaps.
Packaging and design ecosystem matter beyond the wafer process
For a chip built from multiple dies, or one with demanding memory and interconnect needs, packaging can be as consequential to product planning as the front-end process. The three companies describe different packaging portfolios and customer-support ecosystems.
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| Supplier | Packaging and ecosystem offerings named in company materials |
|---|---|
| TSMC | CoWoS, InFO, and SoIC, including chip-stacking capabilities. |
| Intel | EMIB and Foveros packaging families. |
| Samsung | Integrated 2.5D and 3D packaging, the SAFE ecosystem, and the MDI Alliance. |
Samsung Foundry describes services spanning process technology, PDK and design-methodology support, design services, manufacturing, packaging, and ecosystem partnerships. This breadth can matter when planning a design, but a service description does not guarantee a particular project’s yield, schedule, or commercial terms. For any supplier, customers need to confirm support for their specific design, package, tools, and production requirements.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.What public information cannot settle
Company process announcements and annual filings are useful for understanding stated roadmaps, business models, and technology features. They are not enough to make a defensible universal choice of “best” manufacturer.
- Yield: The cited materials do not give a comparable audited yield figure across all three companies.
- Cost: They do not establish comparable cost per wafer or per finished chip.
- Capacity: TSMC reports managed capacity using a stated 12-inch-equivalent measure, but equivalent figures defined on the same basis are not provided here for Intel and Samsung.
- Customer adoption: A company-reported production milestone does not reveal the volume or economics of every customer program.
- Performance: Process labels and architectural features cannot substitute for a common benchmark using the same design and conditions.
Intel’s 14A disclosure adds a specific strategic consideration: continued investment in that node and successors is linked in the company’s filing to securing a significant external customer. That makes customer adoption relevant to Intel’s foundry outlook without resolving whether Intel is the right manufacturing partner for a given product.
How to choose a manufacturer for a real chip
The right supplier depends on the design and business constraints, not on a process label in isolation. A practical evaluation should begin with the product’s requirements and then test each supplier against the same criteria.
Quick Recap
- Set the product targets. Define performance, power, area, package, and anticipated production-volume needs before comparing nodes.
- Check the exact process and schedule. Confirm that the chosen process is available for the design’s required qualification and ramp window; distinguish a production announcement from capacity committed to your program.
- Assess design and packaging fit. Compare PDK and design-methodology support, design services, and the packaging options required by the chip’s architecture.
- Evaluate supply and commercial risk. Consider allocation, geography, continuity, and the supplier’s commitment to the relevant process over the product’s lifetime.
- Compare on design-specific evidence. Request comparable data for the same design objectives and operating assumptions rather than inferring a winner from node names or company claims.
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