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This guide describes the historical Vitis AI 1.1 flow for building and running DNNDK example applications on four Avnet Vitis platform configurations. Published May 12, 2020, it targets Vitis 2019.2; it is not a recommendation to use these versions for a new project today. The work moves from a board-specific hardware design through model and application builds to SD-card preparation and execution on the board.
What Part 1 covers
Mario Bergeron’s May 12, 2020 tutorial uses existing Avnet Vitis platforms to run Vitis AI 1.1 DNNDK API examples. Its targets are four specific board and carrier combinations:
- Ultra96-V2 Development Board
- UltraZed-EV SOM (7EV) with FMC Carrier Card
- UltraZed-EG SOM (3EG) with IO Carrier Card
- UltraZed-EG SOM (3EG) with PCIEC Carrier Card
The tutorial assigns platform modifications for VART-based examples to Part 2. Part 1 therefore does not provide the complete VART-based deployment path. Read the Part 1 tutorial.
Historical software prerequisites
The guide’s listed prerequisites are the Vitis 2019.2 Unified Software Platform, Docker, and Vitis AI v1.1. It instructs readers to check out the Vitis AI v1.1 repository and install the Avnet platform package appropriate to the target board. These are the tutorial’s version-specific requirements, not confirmation that this stack is compatible with current releases or newly acquired hardware. AMD’s Vitis AI 1.1 User Guide is dated March 23, 2020. Consult AMD’s Vitis AI User Guide.
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The five stages of the workflow
- Build the hardware design. Start with the Avnet Vitis platform matching the exact board and carrier combination. The DPU architecture, resources, and clocks vary by target.
- Compile a model. The tutorial uses a model from the Xilinx AI Model Zoo and compiles it for the chosen DPU configuration.
- Build the AI applications. Build the DNNDK API example applications for the deployment target.
- Create the SD-card content. Prepare the card with the content needed to boot and run the application.
- Execute on hardware. Boot the target board and run the AI applications on the device.
The article’s five-stage outline is a workflow map rather than a universal command sequence: follow the tutorial’s board-specific instructions and artifacts at each stage.
Choose the matching DPU configuration
Do not treat the hardware settings as interchangeable. The tutorial specifies B2304 for Ultra96-V2 and both UltraZed-EG carrier configurations, but B4096 for UltraZed-EV with FMC. It also assigns different clock frequencies to the UltraZed-EV path.
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| Target configuration | DPU architecture | DPU clocks specified by the tutorial |
|---|---|---|
| Ultra96-V2 Development Board | B2304 | Platform 150 MHz and 300 MHz clocks |
| UltraZed-EG SOM (3EG) with IO Carrier Card | B2304 | Platform 150 MHz and 300 MHz clocks |
| UltraZed-EG SOM (3EG) with PCIEC Carrier Card | B2304 | Platform 150 MHz and 300 MHz clocks |
| UltraZed-EV SOM (7EV) with FMC Carrier Card | B4096 | 200 MHz and 400 MHz clocks |
These are the tutorial’s settings for its specified platforms, not general settings for every revision or later platform. Confirm the precise SOM, carrier, and matching Avnet platform package before building; do not select a configuration from the board family name alone. The tutorial’s platform instructions provide the context for its board-specific resource and clock choices.
Ultra96-V2 firmware check
The tutorial flags a required PMIC firmware update for the Ultra96-V2 path and directs readers to its known-issues section. Check that section and verify the board’s firmware state before proceeding. The tutorial does not establish whether a particular board already has the update.
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DNNDK versus VART in this tutorial
The guide presents DNNDK as a low-level API for communicating with the DPU, recommended there for developers creating custom neural networks for Xilinx devices. It describes VART and Vitis AI Library as higher-level abstractions for applications built around pretrained Model Zoo models. Those API distinctions do not change Part 1’s scope: its examples use DNNDK, while modifications to Avnet platforms for VART-based examples belong to Part 2.
AMD’s Vitis AI 1.1 component documentation describes a container-distributed release with a tools container and an MPSoC runtime package; VART was among the runtime components based on the 2019.2 release. See AMD’s Vitis AI 1.1 component overview.
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How to use this guide safely
- Match the full board-and-carrier configuration to its Avnet platform package.
- Keep the DPU architecture and clocks paired with the target configuration shown in the table.
- For Ultra96-V2, check the PMIC firmware note before using the board.
- Keep the toolchain at the tutorial’s stated historical versions when reproducing its procedure; the guide does not establish compatibility with newer software.
- Use Part 2 for the separate VART platform-modification route rather than assuming the DNNDK procedure covers it.
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