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Design a spaceflight FPGA around the mission’s radiation environment, duration, criticality, allowable interruption, and recovery needs—not a generic “space-rated” label. Analyze configuration memory separately from functional logic and state, combine mitigation with detection and a defined recovery path, and verify the implemented design against mission-specific evidence. There is no universally best FPGA or scrub interval: both depend on the device, mission, architecture, and assurance baseline.

Start with mission constraints, not the FPGA shortlist

Before selecting a device or fault-tolerance technique, turn mission needs into engineering requirements. The orbit or trajectory and radiation environment affect the faults the design must tolerate; mission duration and system criticality affect how much risk is acceptable. Performance and power targets must be balanced against resource overhead, development complexity, and the project’s assurance obligations.

Capture requirements for:

  • The radiation environment and the device-specific radiation evidence available for the intended application.
  • Mission duration, function criticality, and the consequences of an undetected fault.
  • Permitted outage and maximum acceptable recovery time.
  • Throughput, latency, power, logic resources, and any in-flight reconfiguration needs.
  • Required assurance activities, reviews, and lifecycle evidence under the project’s applicable baseline.

Device technology changes the fault and mitigation picture. ESA describes SRAM-based reprogrammable FPGAs as vulnerable to single-event upsets in configuration memory; an upset can alter programmed logic or routing, not only user data. NASA’s mitigation material distinguishes antifuse, SRAM, flash, and hardened-SRAM configuration approaches. Those labels alone do not establish suitability: ask what the part’s evidence covers for the mission environment, device revision, and intended design. See ESA’s overview of reprogrammable FPGAs in space and NASA’s 2018 FPGA mitigation presentation.

Separate configuration faults from functional faults

Configuration memory determines the implemented logic and routing in an SRAM FPGA. A configuration upset can therefore change how the circuit behaves. Separately, an upset can affect functional data or state—for example, a value held by a user flip-flop. These are different fault classes, so protection for one should not be treated as complete protection for the other.

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For each credible fault, trace whether it can propagate to an externally visible failure, how it would be detected, and what the system should do next. NASA presentation author Melanie Berg states: “Correcting a configuration bit does not mean that you have fixed the state in the functional logic path.” Depending on the design and fault, recovery may require restoring state, resetting the design, or fully reconfiguring the device; configuration repair by itself may not return the system to its expected state. (NASA, FPGA Mitigation Strategies for Critical Space Applications.)

Make recovery behavior part of the architecture. Specify what happens after detection: for example, whether the system restores known state, resets a function, reconfigures the FPGA, switches to a redundant resource, or enters a safe mode. Define how the system determines that recovery succeeded and what it does if recovery fails. The correct sequence depends on which functions can be interrupted and how quickly they must resume.

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Choose mitigation for the faults it actually covers

Redundancy, voting, upset detection and correction, scrubbing, and recovery controls can improve resilience, but none is an automatic guarantee. Their value depends on the device, architecture, upset type, and mission-level fault-tolerance requirements. Compare options by the protection they provide and the cost they impose—not just by whether a feature is present.

Technique What it can address Design question or limitation
Logic replication and voting Can provide redundant computation and a way to select or compare replicated results. Establish which faults the replicas can tolerate and whether the redundancy itself shares vulnerable resources. Effectiveness depends on the implementation and fault model.
Configuration scrubbing For SRAM-configuration devices, scrubbing can detect and correct configuration-memory errors while logic operates. It does not inherently repair functional state or guarantee mission-level recovery. Set cadence from radiation conditions, device characteristics, and system fault-tolerance analysis; no general numerical interval is established.
Upset detection and correction Can identify or correct errors within the specific mechanisms and data paths it monitors. Document detection and correction coverage, including what is outside that coverage. Do not assume configuration-memory protection also covers user logic state.
State restoration, reset, or full reconfiguration Can return affected logic to a known operating condition when configuration repair alone is insufficient. Specify triggers, sequencing, interruption, expected recovery time, and how successful restoration is confirmed.
Fault injection Can reveal how a design responds to injected faults and help evaluate mitigation behavior. It is an analysis and verification technique, not a substitute for radiation testing or mission qualification.

NASA’s SpaceCube illustrates one system-level approach: NASA Goddard describes an FPGA-based onboard hybrid science-data processing system using commercial radiation-tolerant Xilinx Virtex FPGA technology with integrated upset detection and correction. It is an example, not a universal design template or endorsement for other missions. See NASA’s SpaceCube description.

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Set the scrub and recovery policy from the mission analysis

Scrubbing is specifically relevant to SRAM-based configuration memory. It addresses configuration errors, but the interval cannot be selected from a universal rule: it must follow from the mission radiation environment, device characteristics, and system fault-tolerance analysis. The same analysis should establish how soon the system must detect a fault, what interruption is acceptable, and which recovery action is required.

Keep the fault-management chain explicit:

  1. Detect: identify which configuration or functional faults the design can observe, and how quickly.
  2. Contain: determine whether the affected function can be isolated or whether its outputs must be treated as invalid.
  3. Recover: select among state restoration, reset, reconfiguration, redundancy management, or safe mode according to the fault and mission need.
  4. Verify: define how the system confirms that the repaired or restarted function is back in a valid state.
  5. Escalate: specify behavior when recovery fails or exceeds the permitted interruption.

ESA’s FLIPPER description gives a concrete fault-injection example: it injects SEU-like faults into user flip-flops, configuration memory, and reconfiguration control registers to test unprotected designs and evaluate mitigation. Such injection can help assess implemented behavior, but it does not replace radiation testing or full mission qualification. ESA also records lessons from audits of FPGA designs on Rosetta, underscoring the need to examine system and operational failure handling as well as device-level behavior. Both examples appear in ESA’s FPGA-in-space overview.

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Interpret radiation evidence within its tested scope

Radiation-test results apply to the part and test/design conditions actually assessed. ESA’s radiation-testing activity reports that damage to a critical FPGA part leads to functional failures. It also describes a complex design implemented on the COTS RTG4 that performed as expected under heavy-ion irradiation, with many corrected errors and very few design resets. The activity closed in 2021. This is evidence about that described device and test context, not a lifetime reliability figure or a guarantee for another part, revision, configuration, or mission. See ESA’s radiation-testing activity page.

When reviewing evidence, check that it matches the intended FPGA and revision, relevant radiation environment, design configuration, and failure modes. A “radiation tolerant” or similar product description is not, by itself, proof that the complete design meets a mission’s reliability target.

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Make assurance evidence part of the engineering work

Reliability and radiation tolerance require engineering methods, tools, and standards as well as circuit-level mitigation. ESA identifies ECSS-E-ST-20-40C for ASIC, FPGA, and IP-core engineering and ECSS-Q-ST-60-03C for product assurance; its methodology page gives 11 October 2023 as their publication date. Use them as an entry point, then confirm the applicable revisions and project tailoring. Citing a standard does not by itself demonstrate compliance. See ESA’s Microelectronics Development Methodology.

Maintain an assurance record that connects requirements to implementation and evidence. Depending on the project baseline, it should make clear:

  • Which mission assumptions and fault cases drive device selection and mitigation.
  • Which design elements detect, correct, contain, or recover from each addressed fault class.
  • How analysis, reviews, fault injection, and applicable radiation evidence support the claimed behavior.
  • What limitations, residual risks, recovery times, and failure responses remain.
  • Which standards, revisions, and tailoring decisions govern the lifecycle work.

Review the design as a mission-specific trade

Use the same criteria to compare candidate devices and architectures. The answers should come from project requirements and evidence; where a device or project has not established a value, do not infer one from a technology label.

Comparison axis What to establish
Configuration technology How configuration is stored, what upset susceptibility applies, and whether in-flight reconfiguration is needed.
Radiation evidence Whether test or qualification evidence applies to the mission environment, device revision, and design context.
Fault coverage What is covered in configuration memory, functional logic, and system state—and what is not.
Recovery behavior Whether recovery uses state restoration, reset, reconfiguration, safe mode, or redundancy management, and whether its timing meets mission needs.
Implementation cost Resource, performance, power, and design/tool-complexity overhead for the selected protections.
Assurance baseline Required lifecycle artifacts, reviews, applicable standard revisions, and project tailoring.

A mission-specific FPGA choice still depends on its radiation environment and trajectory, duration, part and revision, device radiation data, design criticality, architecture, permitted interruption, recovery requirements, and assurance-plan tailoring. The available evidence supports a design process—not a universal part recommendation, numeric scrub period, lifetime failure rate, or mission qualification verdict.

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