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ULTRARAM is a development-stage memory technology, not a product on sale. Its proposed route to scale is to use III-V semiconductor layers for quantum resonant tunnelling, then grow key antimonide layers monolithically on 6-inch wafers using multi-wafer MOCVD. Quinas Technology and IQE report that epitaxy milestone; it is a manufacturing step, not proof of production yield or of ULTRARAM’s performance advantages.
What ULTRARAM is designed to do
ULTRARAM aims to combine the fast operation and endurance associated with DRAM with the ability of flash to retain data without power. It is designed to use quantum resonant tunnelling to enable low-energy memory operations and non-volatile storage without refresh. Here, “quantum” describes the device’s tunnelling mechanism; ULTRARAM is not a memory for storing quantum-computing states.
Those are design goals, not independently established product results. The account by Peter Hodgson, Chief Technology Officer of Quinas Technology, describes the technology and a manufacturing milestone but does not provide measured latency, bandwidth, retention duration, energy per operation, or program/erase-cycle counts.
Why the III-V materials matter
A lattice-compatible material family
The design draws on a 6.1-angstrom lattice family: gallium antimonide (GaSb), indium arsenide (InAs), and aluminium antimonide (AlSb). The materials are III-V semiconductors—compounds formed from elements in groups III and V of the periodic table. Their high electron mobility and the ability to engineer bandgaps and heterostructures make them useful for building layers with different electronic properties.
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In ULTRARAM’s proposed structure, those layered properties are used to create resonant-tunnelling behaviour. Ternary, quaternary, and quinary alloys could offer further ways to tune the material properties, although the account does not report specific alloy compositions or measured device results.
Why antimonides are a manufacturing challenge
Antimonide devices have been difficult to manufacture at volume. The reported obstacle was not simply identifying suitable materials: it was developing a scalable epitaxial process able to integrate GaSb and AlSb into device-quality wafers. Epitaxy grows a crystalline layer in alignment with the underlying crystal, so the process must control the layers and their interfaces across a wafer, not only produce a promising material sample.
What the 6-inch MOCVD milestone establishes
Quinas Technology and IQE report a monolithic epitaxial-growth process for GaSb and AlSb on 6-inch GaAs substrates, using multi-wafer metal-organic chemical-vapour deposition (MOCVD) reactors. The collaboration lasted 12 months and also involved Lancaster University and Cardiff University, with U.K. government support.
“Monolithic” growth matters because the reported approach integrates the materials in a wafer growth process rather than relying on separate device layers being assembled through additional process transitions. The 6-inch GaAs platform is described as a foundation for a possible future move to 8-inch wafers; it does not mean an 8-inch process has already been demonstrated.
Reducing process transitions could help tighten control and lower contamination risk. The partners also identify potentially better yield and higher throughput as manufacturing advantages. Those are expected benefits, not reported production measurements: no yield, cost, defect-density, or throughput figures are given.
How ULTRARAM compares with established memory
The commercial challenge is to meet several requirements at once. Flash is the cost-per-bit benchmark, while DRAM and SRAM represent higher-performance but more expensive targets. ULTRARAM is intended to bridge some of those differences, but comparative product data are not yet reported.
| Memory | What is established in the account | What remains unreported for this comparison |
|---|---|---|
| Flash | Non-volatile; identified as the cost-per-bit benchmark. | Comparative latency, endurance, and energy figures are not stated in the Quinas account. |
| DRAM | Volatile memory; its speed and endurance are capabilities ULTRARAM aims to match. | Specific comparative figures are not stated in the Quinas account. |
| SRAM | Included among the higher-performance, more expensive memory targets for disruption. | Specific comparative figures are not stated in the Quinas account. |
| ULTRARAM | Development-stage technology designed for non-volatility, low-energy operation, and DRAM-like speed and endurance. | Measured latency, bandwidth, retention, endurance, energy per operation, and price per bit are not reported in the Quinas account. |
For market context, an EE Times article in 2025 put the semiconductor memory market at more than $170 billion, including approximately $97 billion in DRAM, $71 billion in flash, and $1 billion in SRAM. These figures describe market scale, not ULTRARAM’s addressable market or likely share.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.What has not yet been demonstrated
The reported epitaxy process is a materials and manufacturing milestone. It is not an independent benchmark of finished ULTRARAM devices. The available account does not report measured:
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- How long data remain stored without power.
- Energy per read or write operation.
- Program/erase-cycle endurance.
- Wafer defect density, production yield, or manufacturing cost.
The account suggests that single-crystal epitaxy could support endurance orders of magnitude beyond flash, but says further study is needed to confirm the reliability implication. That remains a hypothesis, not a demonstrated cycle-life result.
What has to happen before commercial scale
Quinas’s stated next phase is to reduce layer intermixing, improve wafer-scale uniformity, conduct pilot device-fabrication studies with global foundry partners, transfer process flows from university cleanrooms to commercial environments, and produce packaged prototypes for early customer evaluation.
Each step addresses a different risk: controlling interfaces and uniformity across wafers, making the process work in a foundry setting, packaging working devices, and testing whether the memory’s claimed reliability and energy advantages hold in fabricated prototypes. Antimonide process complexity and cost relative to silicon also remain challenges. Until those steps produce device and manufacturing data, the scale-up case rests on a promising process milestone and a set of targets—not on proven mass-production economics.
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