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Dongbu Electronics qualified its DL018LVT low-voltage 0.18-micron CMOS logic process for foundry production in 2001, about seven months after starting 0.25-micron volume production at its new 200-mm fab in Eumsung, South Korea. The announcement marked a move into the 180-nanometer design market, with a process aimed at logic chips and a planned mixed-signal extension.

What Dongbu announced

On November 14, 2001, EE Times reported that Dongbu Electronics had qualified DL018LVT for foundry products. In this context, a foundry makes chips for outside customers, rather than only producing chips of its own design. Dongbu described the process as low-voltage 0.18-micron CMOS logic.

The qualification followed the start of 0.25-micron volume production at Dongbu’s new 200-mm fab in Eumsung roughly seven months earlier. The reports use “0.18 micron” as the process-generation label; it is also commonly expressed as 180 nm.

What DL018LVT offered

  • Logic connectivity: Up to six metal layers, which provide the interconnect pathways within a chip. Dongbu executive Peter Hillen said, “The 0.18-micron logic process offers up to six layers of metal for connectivity.”
  • Isolation: Shallow-trench isolation, a process feature used to electrically separate devices.
  • Voltage: 1.5-volt operation, as described in the qualification report.

Dongbu said DL018LVT would serve as the basis for DL018MST, a planned mixed-signal process using poly-insulator-poly (PIP) capacitors for precision analog circuits. That was a stated development direction, not evidence that DL018MST was already qualified in the November announcement.

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What the qualification evidence showed

Dongbu said DL018LVT had demonstrated high yields after more than 1,000 hours of burn-in testing, according to EE Times. The report does not provide a numerical yield for DL018LVT, so “high yields” should not be read as a specific percentage.

A separate September 2001 report concerned the earlier Toshiba 0.25-micron process licensed to Dongbu, not DL018LVT. It said initial wafers combining logic, analog, and memory achieved more than 80% good yield. Dongbu COO Wesley Min called the qualification smooth and rapid and highlighted the initial wafer-run yields in remarks reported by EE Times. Those figures provide context for the partnership’s earlier process transfer; they are not a yield result for the 0.18-micron process.

How Toshiba fit into the plan

Toshiba licensed Dongbu CMOS processes at 0.25, 0.18, and 0.13 micron, along with analog, logic, and I/O cell libraries. The arrangement also included an investment of about $50 million by Toshiba in 2001 and a share of foundry capacity for Toshiba, as described in the September qualification report. The licenses and libraries gave Dongbu a technology and design-support foundation; the capacity arrangement gave Toshiba access to manufacturing output.

What Dongbu planned next

The November announcement described several steps beyond DL018LVT qualification. They were plans or offerings reported at the time, and should not be treated as present-day service availability.

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  • Standard-voltage logic: Dongbu expected to have a standard 1.8-to-3.3-volt DL018GD process within weeks.
  • Prototype access: It offered 0.18-micron ShuttleChip multi-project-wafer prototyping. A multi-project wafer combines designs from multiple customers on a wafer, letting participants share mask and processing costs during prototyping. The details were reported by EE Times.
  • Second-source capacity: Dongbu and Tower Semiconductor announced compatible 0.18-micron development and second-source capacity targeted for the first quarter of 2002, according to EE Times. A second source can give customers another manufacturing option for a compatible design.

Why a 0.18-micron qualification mattered

At the time, 0.18-micron processes were becoming a larger part of ASIC design activity. EDN, citing Gartner Dataquest, reported that 0.18-micron design starts represented 31.4% of ASIC starts in 2001, up from 20.8% in 2000. The same report said total ASIC design starts had fallen at least 20% year over year. In that market, a qualified process could help a foundry compete for designs moving to the 0.18-micron generation even as overall demand weakened. These figures and market context were reported by EDN.

Dongbu executive Peter Hillen said the new logic process placed the company “solidly in the middle of the 0.18-micron design window,” as quoted by EE Times. The concrete significance was the combination of a qualified low-voltage logic platform, a stated route toward mixed-signal capability, and announced prototype and capacity options.

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How to read the announcement today

This is a historical account of Dongbu’s 2001 qualification and its plans at that time. The announcement establishes what the company said was qualified and what it intended to offer or develop; it does not establish current Dongbu product availability, current manufacturing capability, or whether every announced follow-on plan was completed.

Product prices and availability are accurate as of the date/time indicated and are subject to change. Any price and availability information displayed on Amazon at the time of purchase will apply.

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