RP1 is Raspberry Pi’s in-house I/O controller, built into Raspberry Pi 5 and used to manage many of the board’s external connections. It is not a standalone microcontroller or a chip sold separately. Raspberry Pi’s October 2023 disclosure opened useful technical documentation for driver and operating-system developers, while making clear that it was not a complete account of RP1 silicon.
What is the RP1 chip in Raspberry Pi 5?
RP1 is a peripheral controller that sits between Raspberry Pi 5’s main application processor, the BCM2712, and many of the interfaces used to connect devices to the board. Raspberry Pi describes the Pi 5 architecture as a separation of application processing from much of the external I/O: BCM2712 handles the main computing role, while RP1 brings together controllers and interfaces for the board’s ports and pins.
Raspberry Pi’s current I/O controller documentation identifies Raspberry Pi 5 and Compute Module 5 as RP1 hosts. That makes RP1 part of a host system’s architecture, rather than a general-purpose board or a Raspberry Pi product in its own right.
What does RP1 control?
RP1 groups a wide range of outward-facing connections and analog interfaces. Raspberry Pi’s launch announcement lists these interfaces:
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- Two USB 3.0 and two USB 2.0 interfaces.
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- Two four-lane MIPI transceivers for camera and display connections.
- Analogue video output.
- 3.3 V GPIO, with UART, SPI, I2C, I2S, and PWM functions multiplexed onto GPIO pins.
These are not all interchangeable ports: some are physical connectors, while others are functions available through the board’s GPIO or camera/display connections. The full interface summary appears in Raspberry Pi’s Raspberry Pi 5 launch announcement.
How does RP1 connect to the Raspberry Pi 5 processor?
RP1 connects to BCM2712 over a four-lane PCI Express 2.0 link. This is an internal connection between two chips on the Raspberry Pi 5, not the user-facing PCIe expansion connector. Raspberry Pi’s launch announcement describes the RP1-to-processor link, and its RP1 peripherals datasheet provides deeper architectural detail.
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Raspberry Pi 5 also exposes a separate PCIe connection for expansion. The external route is intended for compatible accessories and devices; it is distinct from the internal link that lets BCM2712 communicate with RP1. Raspberry Pi explains the design trade-offs behind the external connection, including the use of a small FFC connector rather than an M.2 socket and its supporting power circuitry on every board, in “Double standards.”
Is RP1 a microcontroller like RP2040?
No. RP1 is an integrated I/O controller for host products such as Raspberry Pi 5, whereas RP2040 is Raspberry Pi’s microcontroller product. RP1’s peripheral-control role and its connection to BCM2712 are different from using a microcontroller as a standalone device.
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The distinction also explains the limited scope of the October 2023 disclosure. Raspberry Pi said the initial documentation was intended to help developers write drivers, port operating systems, and use Raspberry Pi 5 features. It did not claim to document every aspect of the silicon. Eben Upton, Raspberry Pi CEO, wrote: “That means that, unlike our documentation around our microcontroller product RP2040, today’s release doesn’t tell you everything about the RP1 silicon that you might want to know; instead, it’s there to help you port an operating system and make use of the features of Raspberry Pi 5.” (6 October 2023 announcement.)
Can you buy an RP1 chip separately?
No. Raspberry Pi’s current I/O controller documentation says RP1 is not sold separately. The relevant products are systems that host it, including Raspberry Pi 5 and Compute Module 5; RP1 is not an ordinary replacement-chip purchase or a development board.
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What did Raspberry Pi reveal about RP1?
The initial technical disclosure made several architectural facts public without presenting a complete silicon manual. Raspberry Pi said RP1 is implemented on TSMC’s 40LP process and has a 20 mm² die. Its later peripheral datasheet describes elements including an internal AXI fabric, PCIe endpoint, dual-core Cortex-M3 cluster for platform configuration and management, and shared SRAM. Those details are useful for understanding the architecture, but the October release itself was framed around enabling software and operating-system work rather than exhaustive silicon documentation.
Raspberry Pi also gave separate development-cost and schedule figures in its launch announcement: the RP1 program had been in development since 2016 and cost $15 million, while the broader Raspberry Pi 5 engineering program spanned over seven years and cost on the order of $25 million. These figures refer to different scopes and should not be conflated.
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