DUV and EUV are complementary lithography technologies, not competing all-or-nothing ways to make a chip. DUV uses ultraviolet light at wavelengths such as 193 nm, while EUV uses 13.5 nm light. EUV can print selected fine patterns with fewer exposures; DUV remains useful across many other layers and can make dense patterns through multiple exposures. Which approach costs less depends on the fab and manufacturing flow—public information does not establish a universal cost-per-wafer winner.
What DUV and EUV lithography do
Lithography transfers a pattern onto photoresist on a silicon wafer. A chip contains many patterned layers, and manufacturers choose a process for each layer according to the pattern and production requirements. DUV (deep ultraviolet) and EUV (extreme ultraviolet) refer primarily to the light used to expose that resist.
ASML lists DUV systems using i-line light at 365 nm, KrF at 248 nm, and ArF at 193 nm; its EUV systems use 13.5 nm light. These are wavelengths in ASML’s lithography portfolio, not a one-to-one map to a particular chip generation or node label. A marketing label such as “2 nm” is not a literal measurement of every feature on a chip.
How wavelength and optics affect resolution
A useful first-order description of lithographic resolution is the Rayleigh relationship: printable feature size depends on the light’s wavelength, the optical system’s numerical aperture (NA), and a process factor. Shorter wavelength helps, but wavelength alone does not determine the final pattern size.
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That is why the fact that immersion DUV can reach a higher NA than standard EUV does not mean it prints smaller features. ASML reports NA up to 1.35 for its highest-resolution immersion DUV systems, compared with 0.33 for its NXE EUV platform. EUV’s much shorter 13.5 nm wavelength is the key difference in that comparison. ASML’s published portfolio figures put representative 193 nm ArF DUV resolution at 38 nm; this is not a universal limit for every DUV process.
| Technology or platform | Wavelength | Numerical aperture | Published resolution figure |
|---|---|---|---|
| ArF DUV, representative portfolio figure | 193 nm | Up to 1.35 for ASML’s highest-resolution DUV machines using immersion | 38 nm representative resolution (ASML, 2025 annual-report infographic) |
| NXE EUV | 13.5 nm | 0.33 | 13 nm (ASML platform specification) |
| EXE High-NA EUV | 13.5 nm | 0.55 | 8 nm (ASML platform specification) |
The EUV figures are ASML system specifications, not guaranteed minimum dimensions for any chip process. Resolution depends on process conditions, and a chip node name should not be read as a direct feature-size measurement.
Why DUV uses lenses and EUV uses mirrors
DUV: refractive optics, with immersion for higher NA
DUV scanners use lenses to focus light. In immersion DUV, water sits between the final lens and the wafer. This raises the system’s numerical aperture, allowing finer patterns than a comparable dry optical arrangement.
EUV: reflective optics in a vacuum
EUV light is absorbed by most materials, including the materials that would make ordinary lenses. EUV scanners therefore use multilayer mirrors and operate in a vacuum environment rather than using a conventional lens-based optical path. The different optical design is a consequence of the wavelength, not simply a choice to use a more powerful lens.
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ASML’s High-NA EXE platform increases NA from 0.33 on NXE to 0.55. ASML says the EXE:5000 can print features 1.7 times smaller and achieve 2.9 times higher transistor density than NXE. These are ASML’s stated system comparisons, not measurements that apply unchanged to every manufacturing process. Its anamorphic optics also make the exposure field half the size of NXE’s, a design trade-off alongside the resolution capability.
How patterning steps differ in chip manufacturing
DUV can pattern fine features through multiple exposures
When a dense pattern is too fine for one DUV exposure, manufacturers can split it into simpler patterns and expose them separately. This multi-patterning approach lets DUV serve demanding layers, but adds process operations and can increase manufacturing time and complexity.
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EUV can reduce exposures on selected critical layers
EUV can form some advanced patterns with fewer exposures than a multi-patterned DUV alternative. Fewer patterning operations can simplify those portions of a process flow, but EUV does not replace DUV on every layer of an advanced chip. DUV remains useful for many applications, including layers that do not need EUV’s resolution.
The practical comparison is therefore layer by layer: how fine the pattern is, whether one exposure can make it, and what the alternative process sequence requires. Comparing technologies by a single node label obscures those differences.
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Cost: why there is no universal winner
Scanner purchase price is only one part of lithography economics. A meaningful comparison also depends on supporting infrastructure, exposures per layer, throughput, utilization, process steps, maintenance, yield, and which layers in the fab use each technology. Public material cited here does not provide comparable DUV and EUV acquisition prices or cost-per-wafer figures for equivalent flows.
ASML describes EUV as capable of reducing process steps, defects, and cycle time on relevant layers, and says fewer multiple-patterning operations can improve wafer output. Those are potential production mechanisms described by the supplier; they do not establish that EUV is cheaper in every fab or at every production volume. A fair conclusion is narrower: EUV can reduce patterning complexity where it replaces multiple DUV exposures, while the overall economics remain specific to the process flow and operating conditions.
High-NA EUV and its additional trade-offs
High-NA EUV raises the numerical aperture to 0.55 and is designed to resolve smaller features than 0.33-NA EUV. Its finer patterning capability may allow some layers to move from multiple patterning to single patterning. The smaller exposure field associated with EXE’s anamorphic optics is also relevant to engineering and throughput considerations; resolution alone does not describe the production trade-off.
ASML’s 2025 annual-report strategy discussion says its model indicates that single-patterning 0.55-NA EUV could potentially reduce operational Scope 1 and 2 emissions by up to 30% per wafer compared with multi-patterning 0.33-NA EUV. This is a modeled potential, depends on assumptions, and compares two EUV flows—not DUV with EUV generally. It should not be treated as a measured, universal emissions saving.
Which technology makes sense?
- DUV: suited to a broad range of patterned layers; immersion optics provide high NA, and multiple exposures can extend its use to very fine patterns.
- EUV: useful for selected critical layers where its shorter wavelength can produce dense patterns with fewer exposures than a multi-patterned DUV route.
- High-NA EUV: extends EUV’s resolution capability, with a changed exposure field and vendor-stated system benefits that must be considered in the context of a specific manufacturing flow.
The right choice is not simply the technology with the shortest wavelength or smallest published resolution number. Manufacturers balance pattern requirements against process complexity, throughput, yield, and fab-specific economics.
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