Quantum computers today are unreliable mainly because qubits are sensitive to their surroundings, and errors can arise while information is prepared, stored, manipulated, or measured. Those errors can accumulate through a circuit. Error mitigation and quantum error correction can improve particular results, but current progress does not mean every machine can reliably run long, general-purpose computations. To judge a reliability claim, look at how logical information behaves under a specified workload—not just the device’s physical-qubit count.
Why are quantum computers vulnerable to errors?
Qubits are affected by their environment
A qubit holds information in a quantum state, which can be disturbed by interactions with its surroundings. This sensitivity can lead to noise and decoherence: the state may change or lose the properties a computation depends on. IBM’s May 30, 2025 fault-tolerance explainer, by Robert Davis, Olivia Lanes, and John Watrous, describes a fault-tolerant quantum computer as one “designed to operate correctly even in the presence of errors.” The need for that design follows from how errors can enter a computation, not from one defective component alone.
Errors may arise during state preparation, gate operations, idle storage, and measurement. Leakage and hardware imperfections are also relevant. As a result, an isolated gate-error figure cannot describe the reliability of a complete device running a particular circuit.
Errors can build up across a circuit
Each operation or period of storage is another opportunity for an error to affect the result. A longer or more complicated circuit can therefore be harder to run reliably, but simply counting operations does not tell the whole story: the type of noise and the circuit’s sensitivity to it matter too.
A 2025 study by Luis Pedro Garcia-Pintos, Tom O’Leary, Tanmoy Biswas, Jacob Bringewatt, Lukasz Cincio, Lucas Brady, and Yi-Kai Liu, indexed by NIST, analyzes coherent, dephasing, and depolarizing noise. Its theoretical framework warns that minimizing a compiled circuit’s operation count can be counterproductive if the resulting algorithm is more sensitive to noise. It is not a benchmark comparing deployed quantum computers, so it supports a caution about circuit design rather than a ranking of devices.
What is the difference between mitigation, error correction, and fault tolerance?
These terms describe different levels of response to noise. Mitigation can make estimates from selected noisy computations more useful; quantum error correction protects encoded information by checking for errors; fault tolerance aims to keep a computation reliable as errors are detected and corrected during its execution.
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| Approach | What it does | What it does not establish by itself |
|---|---|---|
| Error mitigation | Uses methods to improve estimates or outputs from noisy computations in particular settings. | It does not mean errors are being corrected as they occur, or that arbitrary long circuits will work reliably. |
| Quantum error correction (QEC) | Encodes information across groups of physical qubits and uses checks, including measurements of error syndromes, to protect logical information. | The presence of encoding alone does not show that a system can sustain every target computation reliably. |
| Fault-tolerant computing | Aims to detect and correct errors during computation so that they do not overwhelm longer circuits. | It is not a label that follows from a physical-qubit count or one favorable result. |
Correction has costs of its own. Encoding uses multiple physical qubits for logical information, and the system must coordinate checks, measurements, resets, decoding, and control. Fast measurements and classical decoding, along with coordination between a quantum processing unit and classical computing, are among the engineering challenges.
In a September 15, 2026 article, IBM described mitigation and correction as approaches along a continuum toward fault tolerance and said real-time hierarchical QEC is not directly accessible with current-generation systems. IBM also discusses intermediate methods that improve effective errors or sampling overhead in particular settings; such reported benefits should be understood in the context of the method and workload involved.
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What does a recent logical-qubit result show?
On July 30, 2026, IBM and the University of Chicago announced an encoded-circuit demonstration involving 70 logical qubits, 2,415 logical two-qubit operations, and 468 logical T gates. The team said effective logical error rates were 10 times lower than physical error rates. These are the announcing team’s figures for that demonstration—not a universal score for quantum computers or a cross-platform comparison.
The result illustrates why logical-level evidence matters: it reports on encoded information and logical operations, rather than relying only on the number of physical qubits. To interpret any such claim, ask what error metric was measured, whether it covers the full circuit or only a component, how the code and workload were selected, how the result was validated, and what physical and classical resources were required.
Verification is itself a challenge. IBM’s announcement quotes University of Chicago Associate Professor Bill Fefferman: “Verification remains one of the biggest challenges in firmly establishing experimental quantum advantage.” The statement concerns establishing experimental quantum advantage; it is not an independent validation of every result in the announcement.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.How should you compare quantum-computer reliability claims?
Compare systems only when the measurements and workloads are meaningfully aligned. A strong claim should make clear what was tested, how it was measured, and what resources were needed—not just give a best-case component metric.
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- Gate performance: Check the gate type, error measurement, and speed; different gate figures are not automatically comparable.
- Preparation and readout: Look for errors in preparing the starting state and reading the result, not only errors during gates.
- Memory and coherence: Consider how well information holds up while qubits are idle.
- Connectivity: Limited connectivity can require extra operations to route a circuit, affecting its exposure to errors.
- Logical behavior as scale grows: Ask whether logical error rates improve as the code becomes larger or the workload runs longer.
- Correction overhead: Check how many physical qubits, measurements, resets, and classical decoding resources are used per logical operation.
- Workload relevance: Identify the target circuit and benchmark, and whether they resemble the computation for which reliability is being claimed.
- Verification and evidence: Distinguish a vendor announcement from a peer-reviewed result or an independent replication, and check how outputs were verified.
No field-wide current reliability statistic or harmonized comparison across superconducting, trapped-ion, neutral-atom, photonic, and other hardware platforms is established by the cited material. A single qubit count, benchmark, or best-case gate metric is therefore not enough to rank those platforms or establish useful reliability.
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