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First identify which side of the transformer you mean
An Ethernet transformer separates the PHY’s electrical interface from the cable-side interface. A center tap is the midpoint of a winding; it is not inherently a ground pin or a power input. Its connection depends on the winding’s role and the circuit surrounding it.
- PHY side: The winding connects toward the PHY’s MDI pins. Its center tap may provide common-mode bias or an AC return, depending on the PHY architecture.
- Cable side: The winding connects toward the RJ-45. Its center taps can be used in common-mode termination and, in some designs, PoE power injection.
Do not identify a tap by its position in a drawing or by a MagJack pin number alone. Use the magnetics or MagJack datasheet to trace each pin to its winding, then compare that winding with the PHY reference schematic.
What the PHY-side examples show
PHY manufacturers do not all prescribe the same center-tap connection. Two Texas Instruments examples illustrate why the PHY’s own guidance matters.
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DP83867: capacitive coupling to ground
The Texas Instruments DP83867IR/CR datasheet, Revision G, Section 9.2.1.1 and Figure 9-2 says that each PHY-side center tap must be isolated from the others and connected to ground through a decoupling capacitor, with 0.1 µF recommended. This is not the same as directly grounding the taps: the capacitors provide an AC path while blocking a direct DC connection.
The figure’s cable-side termination uses 75 Ω resistors and a 1 nF, 2 kV capacitor. Those values describe the illustrated design, not a universal Ethernet requirement. The datasheet also names the Pulse Electronics HX5008FNL as a recommended discrete magnetics solution and specifies a 1:1 turns ratio with ±2% tolerance among its magnetic isolation requirements.
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TI application-report example: filtered 3.3 V
A separate Texas Instruments application-report example connects the microcontroller-side transformer center tap to 3.3 V with filtering. It describes at least 0.1 µF of filtering when the connection uses a solid plane, or at least 1 µF when it uses a trace. Its RJ-45-side Bob Smith network uses 75 Ω resistors and a 1000 pF capacitor rated at least 2 kV to chassis ground.
These examples are not interchangeable recipes. Select the connection specified for your PHY and confirm that the magnetics pinout and electrical requirements match that design. Microchip’s LAN9646 Hardware Design Checklist provides another example: its chip-side center taps are independently connected to signal ground through 0.1 µF capacitors, and it recommends magnetics with isolated center taps.
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What cable-side center taps do
Common-mode termination
A cable-side center tap often participates in a Bob Smith termination network. In the cited TI examples, 75 Ω resistors connect the cable-side conductors to a common point, which is coupled to chassis ground through a high-voltage capacitor. Follow the selected PHY and magnetics design for the network arrangement and component ratings; do not substitute signal ground for chassis ground just because both are drawn with a ground symbol.
PoE power injection
Power over Ethernet is a separate use of cable-side center taps. TI’s PoE application brief explains that standard PoE can inject power through transformer center taps for Gigabit Ethernet or when spare pairs are unavailable. Analog Devices’ LTC4255 PoE article notes that the 48 V line supply must be isolated from PSE chassis ground to maintain link isolation.
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PoE at the cable-side taps does not mean the PHY-side taps should connect to the PoE rail. Use the PoE controller and PHY design guidance together, and preserve the isolation required by the design.
Compare the two sides before wiring
| Winding side | Typical role | Cited design examples | What to verify |
|---|---|---|---|
| PHY / chip side | PHY common-mode bias or AC return | DP83867: separate taps coupled to ground through 0.1 µF capacitors. TI application-report example: microcontroller-side tap connected to filtered 3.3 V. | PHY model, output/bias architecture, reference circuit and magnetics compatibility. |
| Cable / RJ-45 side | Common-mode termination; sometimes PoE power path | TI examples show 75 Ω resistors and a 1 nF or 1000 pF high-voltage capacitor to chassis; PoE designs may inject power through the taps. | Bob Smith topology, chassis connection, PoE controller guidance, magnetics pinout and isolation. |
Every listed value belongs to its cited example. Ethernet mode, PHY driver topology, PoE role, whether center taps are internally joined, and the distinction between chassis and circuit ground all affect the correct implementation.
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How to determine the right connection on your schematic
- Find the exact part documents. Get the PHY datasheet and reference schematic, plus the transformer or MagJack datasheet. Label each winding as PHY/chip-side or cable/line-side based on the pinout, not its physical position.
- Read the PHY’s magnetics circuit. Determine whether each PHY-side tap connects to a filtered supply, is coupled to ground through a capacitor, uses another specified arrangement, or is handled differently. Keep separate taps separate if the reference design requires it.
- Check the magnetics construction. Confirm whether the center taps are separate, internally joined or absent, and verify the module’s electrical requirements against the PHY.
- Review the cable-side networks independently. Check the Bob Smith termination and any PoE injection against the relevant magnetics, PHY and PoE-controller documents.
- Preserve the grounding and isolation scheme. Do not directly join chassis ground and signal ground merely because both are called ground. Follow the selected design’s capacitor and grounding paths.
Common wiring mistakes to avoid
- Assuming every tap needs 3.3 V: One cited PHY example uses filtered 3.3 V, but the DP83867 example instead capacitively couples separate PHY-side taps to ground.
- Assuming a capacitor means a DC ground: A tap connected to ground through a capacitor has an AC path, not a direct DC connection.
- Confusing the cable-side PoE path with PHY bias: PoE injection through cable-side taps does not determine the PHY-side tap connection.
- Joining taps or grounds without checking: Some designs call for independently isolated PHY-side taps, and chassis ground is not automatically interchangeable with signal ground.
- Relying on a generic MagJack pinout: Trace the actual part’s winding connections and check them against the chosen PHY reference design.
Without the PHY model, magnetics pinout, interface mode and PoE details, a particular board’s correct wiring cannot be established. The safe decision is to identify the winding first and follow the reference design for that exact combination.
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