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SiFive’s January 15, 2026 announcement is a roadmap and integration commitment: the RISC-V designer plans to combine customizable CPUs with NVIDIA GPUs and accelerators through NVLink Fusion. It expands CPU choice inside NVIDIA’s AI ecosystem, but it does not announce a generally available SiFive NVLink server.

What SiFive announced

SiFive said it is adopting and integrating NVIDIA NVLink Fusion into its high-performance, data-center-class solutions. The proposed architecture gives SiFive-based CPUs a coherent, high-bandwidth connection to NVIDIA GPUs and other accelerators, with the goals of reducing latency, improving data sharing and raising system utilization.

SiFive president and CEO Patrick Little described the combination as an open, customizable CPU platform that can pair with NVIDIA AI infrastructure at data-center scale. NVIDIA founder and CEO Jensen Huang characterized the move as bringing NVIDIA’s coherent NVLink interconnect into the RISC-V ecosystem.

The wording matters. The announcement establishes an integration direction and future-platform commitment; it does not identify a broadly shipping SiFive server with NVLink Fusion.

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How NVLink Fusion fits an AI server

AI systems often spend significant time moving data among CPUs, GPUs, memory and other accelerators. If that movement is slow or requires excessive copying, expensive GPU compute can sit idle. NVLink Fusion is intended to address that system-level bottleneck rather than merely add another processor.

NVIDIA describes NVLink Fusion as high-bandwidth, low-latency connective technology and intellectual property that allows hyperscalers and AI companies to place custom CPUs or XPUs into NVIDIA’s AI-infrastructure platform. A unified design can support heterogeneous mixes of processors, simplify data-center operations and allow resources to be reprovisioned for different workloads.

For SiFive, the attraction is the combination of two properties:

  • RISC-V customization: customers can build or tailor CPU subsystems around an open instruction-set ecosystem.
  • NVIDIA accelerator access: the CPU can be designed to work as part of an NVIDIA-centered GPU and accelerator system instead of operating as an isolated host.

The announcement does not disclose a SiFive-specific NVLink bandwidth figure, latency result, server topology or production benchmark. NVIDIA’s published NVLink figures describe the broader Fusion architecture, not measured performance of a SiFive implementation.

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What exists now: the BigSky SF-2U870

On August 24, 2026, SiFive introduced the BigSky SF-2U870, an enterprise-grade, rackable 2U RISC-V development platform. Its stated purposes are software porting, workload tuning and validation testing. SiFive says it is available in limited quantities and that demand exceeds supply.

Component SiFive-stated specification
Processor 32 P870-D RISC-V cores at 2.0 GHz
Memory 256 GB DDR5-5600
Expansion Four PCIe Gen5 x16 slots, providing 64 lanes, plus one PCIe Gen3 x4 connection
Storage Two 7.68 TB U.2 NVMe SSDs
Network 10/25Gb OCP 3.0 NIC

SiFive and NVIDIA are also working to port CUDA to SiFive-based RISC-V hardware and integrate NVLink Fusion into future SiFive platforms. SiFive reports that CUDA runs on the P870-D-powered BigSky as a head node for large-language-model workloads running on NVIDIA GPUs. That is concrete evidence of software and platform progress, but it is not evidence that a production NVLink Fusion server is broadly shipping.

Can a RISC-V CPU connect to an NVIDIA GPU?

Yes, at the architecture level. NVLink Fusion is specifically intended to let selected third-party CPU designers connect custom processors to NVIDIA’s accelerator ecosystem. SiFive’s CUDA demonstration shows a RISC-V system coordinating workloads on NVIDIA GPUs.

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There are two different claims to keep separate:

  1. Software and host compatibility: CUDA has been demonstrated on the BigSky platform as a head node for GPU workloads.
  2. Integrated NVLink Fusion hardware: SiFive says this is being incorporated into future platforms; the cited announcement does not establish a generally available production system with that integration.

Buyers should therefore treat “RISC-V with NVIDIA GPUs” as demonstrated development capability, while treating “SiFive NVLink Fusion server” as an emerging platform category rather than an off-the-shelf product.

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How large is the wider NVLink Fusion architecture?

NVIDIA’s current platform description gives a sense of the intended scale. These numbers apply to NVIDIA’s NVLink Fusion architecture and are not benchmarks for BigSky or any announced SiFive server.

Published figure What it describes
72 XPUs NVLink 6 all-to-all connectivity in a stated domain
3.6 TB/s per XPU NVIDIA’s stated bandwidth for that NVLink 6 configuration
Up to 1,152 devices Future roadmap scale cited by NVIDIA
260 TB/s NVIDIA’s stated bandwidth for an NVL72 domain

Those figures explain why interconnect design is central to rack-scale AI, but they should not be read as performance promises for SiFive’s CPUs.

Why the integration matters to data-center designers

More CPU design choice

AI infrastructure has historically been assembled around a small number of established CPU ecosystems. SiFive’s proposal adds an open, customizable RISC-V option inside a platform built around NVIDIA accelerators. Customers that need domain-specific control over cores, memory behavior or system integration may value that flexibility.

Less data-movement friction

A coherent, high-bandwidth CPU-to-accelerator path can reduce the cost of exchanging model data, control information and intermediate results. The potential benefit is higher utilization of the GPU fleet, although actual gains will depend on the final implementation, workload and software stack.

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A practical migration path for software teams

The BigSky CUDA work gives developers a place to port code, tune workloads and validate RISC-V as a host before a future integrated platform is available. Porting remains a real engineering task: operating-system support, compilers, libraries, drivers, observability tools and deployment automation all need to work reliably on the target system.

Heterogeneous infrastructure without a single processor type

NVIDIA’s stated Fusion model supports combinations of CPUs, GPUs and other XPUs. In principle, that lets operators match processors to workload roles and reprovision systems as demand changes. The operational benefit will depend on how completely vendors deliver common management, firmware and monitoring tools.

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How to evaluate RISC-V, Arm and x86 alternatives

The relevant question is not simply which instruction set is fastest. For an AI-server purchase or custom design, evaluate each candidate on the following dimensions:

  • Customization: can the CPU include the extensions, core mix and memory features your workload requires?
  • Interconnect: is the CPU-to-GPU or CPU-to-XPU link coherent, and are independently published bandwidth and latency figures available?
  • Software maturity: are the operating system, compiler, CUDA or equivalent accelerator stack, libraries and management tools production-ready?
  • Compatibility: can existing applications be ported without unacceptable changes to code, containers and deployment pipelines?
  • Rack integration: are validated boards, firmware, networking, storage and service procedures available at the intended scale?
  • Availability and supply: is the system a limited development platform, a qualification sample or a regularly orderable production server?
  • Lock-in: which parts of the design are open, and which depend on one accelerator, interconnect or software vendor?

SiFive’s proposition is strongest where customization and an open CPU platform matter. A conventional Arm or x86 server may still be the lower-risk choice when mature software, broad vendor availability or existing operational tooling outweighs the value of a new CPU ecosystem.

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Is a SiFive NVLink Fusion server available now?

Not as a broadly announced production product on the evidence available here. The BigSky SF-2U870 is a limited-quantity RISC-V development platform, and CUDA has been demonstrated on it with NVIDIA GPUs. SiFive describes NVLink Fusion integration as work for future platforms.

Organizations evaluating the technology should ask vendors for the exact platform status, NVLink generation and topology, supported GPU models, CUDA and driver versions, firmware requirements, software-support terms, delivery schedule and independently reproducible performance data. Those details determine whether a system is suitable for experimentation, qualification or production deployment.

SiFive’s position in the RISC-V ecosystem

SiFive reports that its IP has appeared in more than 500 designs and that more than 10 billion SiFive cores have shipped. Those are company-reported figures, but they indicate the scale of the supplier’s existing IP business. The NVLink Fusion effort extends that business toward tightly integrated AI and data-center systems rather than changing the status of every RISC-V server overnight.

Bottom line

SiFive’s NVLink Fusion move is significant because it puts customizable RISC-V CPUs on a path into NVIDIA’s high-bandwidth AI infrastructure. BigSky and the CUDA head-node demonstration show meaningful development progress. The decisive milestone is still a production SiFive platform with NVLink Fusion that customers can order, qualify and operate at rack scale.

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