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The IA-64 System V Processor-Specific ABI, often called the Itanium psABI, is a processor-specific supplement to the generic System V ABI. It defines how compatible compilers, linkers, loaders and runtimes represent and execute programs on Itanium systems; it does not replace the generic ABI or the architecture’s other software conventions.
What does the IA-64 processor-specific ABI define?
An application binary interface (ABI) sets rules that compiled programs and system components must share. The generic System V ABI defines the system interface for compiled applications; the IA-64 supplement supplies processor-dependent rules for the Itanium architecture. Those rules cover matters such as data representation, ELF objects, linking, loading, signals and unwinding.
The supplement is meant to be read alongside the generic System V ABI and companion Intel documentation, especially the Itanium Architecture Software Developer’s Manuals and the Itanium Software Conventions and Runtime Architecture Guide. Architecture details and runtime conventions in those references help explain how the processor-specific rules are implemented.
Does IA-64 use LP64, and what does that mean?
LP64 is the principal programming model specified for IA-64. In this model, C int is 32 bits, while long and pointers are 64-bit objects. The supplement also discusses ILP32, but gives only non-binding considerations rather than a complete specification for that model.
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| Model | What the supplement establishes | What to keep in mind |
|---|---|---|
| LP64 | C int is 32 bits; long and pointers are 64-bit objects. long long occupies 8 bytes and is aligned to 8 bytes. long double occupies 16 bytes of storage and uses an 80-bit extended-double format internally. |
This is the fully specified construction described by the supplement. |
| ILP32 | The supplement provides considerations, not a complete binding construction; corresponding object sizes and alignments are not fully specified by it. | Do not assume that an ILP32 implementation follows the same details as LP64. |
The architecture supports a 64-bit instruction set as well as IA-32 compatibility. That compatibility does not make every IA-32 program an IA-64 ABI program: binaries still need to match the relevant processor, operating-system and ABI conventions.
Does the IA-64 ABI require a particular byte order?
No single byte order is required by the supplement: it permits both big-endian and little-endian ABI instantiations. An operating-system profile can select one, so the byte order of a particular system or binary must be determined from that profile and the object metadata rather than inferred from “IA-64” alone.
How are IA-64 ELF files different?
IA-64 uses ELF, extending the generic ELF contract with processor-specific identification, flags, section types and attributes, relocations, and metadata for linkers and loaders. Linux Standard Base documentation for IA-64 requires ELF support based on the System V ABI and the Intel Itanium processor-specific ABI, with LP64 support and the EM_IA_64 machine identification.
Common IA-64 section names include:
.got, used in global-addressing conventions;.IA_64.pltoffand.plt, associated with procedure-linkage mechanisms;.IA_64.archext, a processor-specific section;.IA_64.unwindand.IA_64.unwind_info, which carry unwind-related information; and.sbss,.sdataand.sdata1, processor-specific data sections.
A section name alone is not enough to establish whether two objects can be linked together. Compatibility also depends on the object’s machine identification and flags, relocation conventions, code model, and the conventions implemented by the toolchain and runtime.
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Position-independent code
The supplement requires ABI-conforming relocatable files, executable files and shared-object files supplied as part of an ABI-conforming application to use position-independent code (PIC), following the Itanium software conventions. PIC allows code to operate without depending on one fixed load address; it is an ABI requirement for these files, not merely an optional optimization.
Global pointers and procedure linkage
IA-64 dynamic linking has processor-specific runtime rules. The DT_PLTGOT dynamic entry supplies the address contained in the object’s global pointer, or gp. The IA-64-specific DT_IA_64_PLT_RESERVE tag reserves three contiguous 8-byte words for the dynamic linker.
Interpreter paths
The dynamic interpreter path depends on code model and byte order. For example, the specification lists /usr/lib/ia64l64/ld.so.1 for little-endian LP64. Other paths are specified for ILP32 and big-endian variants, so this example should not be treated as the universal IA-64 loader location.
How does the ABI handle function pointers, signals and exceptions?
On IA-64, a function pointer points to a function descriptor, which contains an entry address and a global-pointer value. Signal delivery must account for that representation when handling function addresses and restoring execution state.
The ABI maps hardware conditions—including TLB faults, access faults, privilege violations, consumption of a register containing a NaT value, unaligned data, floating-point exceptions and illegal instructions—to defined signal behavior. These mappings connect processor events to the operating system’s application-facing signal handling.
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The unwind-library interface is expected on an Itanium psABI-compliant system and provides the foundation on which C++ ABI exception handling is built. Its context APIs expose fixed and stacked general-register state to personality routines and unwinding code, allowing runtime components to inspect execution contexts while unwinding.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.How can you assess compatibility between IA-64 toolchains?
Matching the label “IA-64” is not by itself proof of binary compatibility. When checking whether a compiler, linker, loader and runtime can work together, compare the conventions that determine how objects are built and executed:
Quick Recap
- Data model: confirm LP64 support and establish whether any ILP32 behavior is actually specified by the relevant implementation.
- ELF compatibility: check machine identification, ABI-model flags, section types and attributes, relocations, and linker acceptance.
- Code model and byte order: verify the selected addressing model, endianness and corresponding interpreter path.
- Dynamic linking: check global-pointer handling, PLT/GOT conventions and IA-64 dynamic tags.
- Runtime behavior: confirm support for function descriptors, signal delivery, unwind metadata and C++ exception handling.
- Shared conventions: ensure the compiler, linker, loader and libraries implement compatible versions of the supplement and its referenced runtime conventions.
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