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The Microchip PolarFire SoC Icicle Kit runs Linux on RISC-V application cores while also giving you FPGA fabric on the same device. For a first boot, follow Microchip’s QuickStart Guide to connect power, Ethernet and the micro-USB UART, then start with the supplied Linux image. To create a custom image, use Microchip’s Yocto-based Linux workflow and configure the board’s device tree for the peripherals your project needs.
What the Icicle Kit combines
The MPFS-ICICLE-KIT is a development board built around Microchip’s MPFS250T PolarFire SoC FPGA. Microchip describes the device as combining a Linux-capable RISC-V processor subsystem with PolarFire FPGA fabric in one device. The board documentation lists one SiFive E51 monitor core and four SiFive U54 application cores; the QuickStart Guide lists 254K logic elements. These are different resources: the processor cores execute software, while the programmable logic can implement hardware functions alongside them.
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Microchip Technology, MPFS-Icicle-KIT-ES, PolarFire SoC FPGA SiFive RISC-V Icicle Kit MPFS250T... | $1,085.72 | Buy on Amazon |
The kit exposes interfaces useful for embedded development, including Gigabit Ethernet, USB, an SD-card slot, PCIe, CAN and expansion connectors. The exact connectors and available resources should be checked against the guide for your board revision. See Microchip’s Icicle Kit product page, the PolarFire SoC Icicle Kit QuickStart Guide, and Microchip’s embedded-software user guide.
Before you boot: identify the board revision
Check the board label and match it to the documentation before following setup or build instructions. The documentation distinguishes the current MPFS-ICICLE-KIT from an earlier engineering-sample kit; steps and configurations for one revision should not automatically be assumed to apply to the other.
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First boot with the supplied Linux image
Use the official QuickStart procedure for the board rather than guessing at connector functions or console settings. Its basic setup uses the supplied 12 V power connection, Ethernet and micro-USB connection for the UART console, followed by booting the supplied Linux image. Refer to the guide for the precise connection order and board-specific operating steps.
- Confirm that your board revision matches the QuickStart Guide.
- With the board unpowered, connect the 12 V supply, Ethernet and micro-USB UART as directed by the guide.
- Follow the guide’s instructions to start the serial console and power up the board.
- Allow the supplied image to boot and use the console output to verify that startup completes.
If the console does not show the expected boot output, check the UART connection and the guide’s console setup instructions before changing the image or board configuration.
Build a custom Linux image
Microchip’s custom Linux workflow uses the linux4microchip Yocto manifest and board device-tree configuration. The GPIO development guide is a practical entry point for setting up a Linux or WSL build host, initializing the manifest and building for the Icicle target. Follow that guide for the current commands, dependencies and target naming; those details can change, so copying an unverified command from another board or release is risky.
- Prepare the build host. Use Linux or WSL and satisfy the host requirements in Microchip’s GPIO application guide.
- Initialize the Yocto workspace. Use the linux4microchip manifest and the manifest initialization steps documented by Microchip.
- Select the Icicle configuration. Build the target identified in the documentation for your board revision and software release.
- Configure board support. Update the device tree and package configuration for the peripherals and Linux interfaces your application requires.
- Deploy and validate. Install the resulting image using the documented board procedure, then confirm boot and peripheral behavior on the kit.
For GPIO, Microchip’s example demonstrates the supported pattern of configuring board support and using Linux to access the peripheral. Consult the GPIO application guide for its current device-tree and package instructions.
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Test a peripheral from Linux before moving it into FPGA logic
GPIO
Use the GPIO example and the configuration appropriate to your board revision to verify Linux-side access. Device-tree configuration matters: a peripheral must be described and enabled in the board configuration before software can use it as intended.
SPI
Microchip’s SPI example shows testing SPI from Linux userspace with spidev_test or a C program. Start with the SPI application guide and its board configuration and test instructions. A userspace test is a useful way to validate the Linux and peripheral path before deciding that a function needs a custom FPGA implementation.
Decide what belongs in Linux and what belongs in the FPGA
The Icicle Kit’s defining design choice is processor-plus-FPGA partitioning. Run ordinary application logic, networking and operating-system services on the RISC-V application cores. Consider FPGA fabric for functions that need deterministic hardware behavior or acceleration, with Linux coordinating or consuming the results. The right split depends on the application; the available documentation establishes the architecture, not application-specific performance gains.
When comparing the Icicle Kit with another development board, assess the factors that affect the whole project rather than processor branding alone:
- Linux support: availability of a maintained image, build workflow and board documentation.
- Processor system: core count and whether the design supports the real-time behavior your application needs.
- Programmable logic: logic and DSP resources for the functions you expect to implement in hardware.
- Connectivity: required PCIe, Ethernet, USB, CAN and expansion I/O.
- Security: the documented secure-boot and security features relevant to your deployment.
- Toolchain: the vendor tools and design flow required to create and validate FPGA designs.
Microchip’s PolarFire SoC product information and Icicle Kit page are starting points for checking device and kit capabilities. They do not substitute for matching features to a particular project or board revision.
What the published specifications do—and do not—tell you
The cited Microchip documentation establishes the board’s processor-plus-FPGA architecture, listed interfaces and logic-element count. It does not establish independent performance benchmarks, power measurements or application-level results. Treat those as project-specific questions to test on the intended hardware rather than inferring an outcome from the core count or FPGA capacity.
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