To run an AI model on a microcontroller, choose a model that fits the board’s flash and RAM, convert it to an operator set the firmware supports, quantize it where accuracy allows, then compile and measure it on the actual device. TensorFlow Lite for Microcontrollers (TFLM) provides a small inference runtime for microcontrollers and DSPs; successful conversion on a desktop does not guarantee that the model will fit or run on your target.
What it means to run AI on a microcontroller
TinyML runs inference locally on a resource-constrained microcontroller instead of sending sensor data to a cloud service or a Linux-class computer. The device receives sensor input, runs the model and produces an output on the MCU. This can suit tasks such as keyword spotting and visual wake-word or person detection, which appear in TFLM’s published benchmark suite.
TFLM is an inference runtime, not a shortcut around model design or firmware constraints. Google’s conversion workflow takes a trained TensorFlow model, checks which operations it uses and produces a representation that can be built into firmware. Because many microcontroller platforms lack native filesystem support, the model is commonly embedded as a C array.
How to fit a model onto an MCU
- Choose the target and workload. Start with the board, its sensors and the task the model must perform. Check available RAM and flash, processor capabilities, clock, power modes, toolchain and whether the board includes an accelerator. A model’s input shape and sensor buffers are part of the resource budget, not afterthoughts.
- Select a model architecture that fits. Keep both the model data and inference requirements within the target’s limits. The firmware also needs room for the runtime, application code, tensor arena and input/output buffers.
- Convert the trained model and check its operators. Use the TFLM workflow to convert the TensorFlow model and inspect the supported-operator requirements. Unsupported or expensive operations may require changing the model or its conversion path; a successful desktop conversion alone does not show that the target firmware can execute it.
- Quantize and build for the target. Integer quantization is a primary way to reduce model storage and computation. Embed the converted model in the firmware where required, then compile for the specific board and kernel backend.
- Measure the complete target build. Check whether the firmware links, whether the tensor arena is large enough at runtime, and how much flash, RAM, latency and energy inference uses. Measure accuracy too, using representative sensor data on the quantized model.
What quantization changes
Int8 is a common first choice
Eight-bit integer weights and activations usually reduce model storage and arithmetic cost compared with higher-precision representations. Quantization can also change model accuracy, so compare the converted model against representative sensor examples rather than relying only on desktop validation.
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16×8 can be a middle ground
If 8-bit activations reduce accuracy too much, 16×8 quantization is one alternative to evaluate. TensorFlow documentation cited in TFLM’s 2021 16×8 RFC said it could improve accuracy while still achieving “almost 3-4x reduction in model size” and remaining usable by integer-only accelerators. Treat that reduction as the documentation’s characterization, not a guaranteed result for every model.
How CMSIS-NN affects performance
CMSIS-NN is a collection of optimized neural-network kernels for Cortex-M processors. TFLM’s Arm IP documentation says these kernels follow the runtime’s int8 and int16 specifications and are bit-exact with reference kernels. That compatibility helps preserve the reference results, but it does not promise a fixed speedup: performance depends on the Cortex-M processor, compiler, model and benchmark.
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The TFLM paper reported more than 4x speedup for its optimized Visual Wake Words model using CMSIS-NN on a Cortex-M4. That is a result for the specified workload and platform, not a general prediction for every model or board. TFLM’s optimization guidance recommends choosing a benchmark and documenting measurable performance improvements.
What must fit in RAM and flash
The model, tensor arena, runtime and application code compete for flash and RAM. Sensor buffers also consume memory. A model that converts successfully on a desktop can still fail during linking because the firmware exceeds flash limits, or at runtime because the tensor arena is too small. Profile the target build and validate its memory use on the device rather than estimating from model-file size alone.
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Latency and energy matter alongside fit. Record the workload and measurement conditions so another result—or a later firmware build—can be compared meaningfully. Useful benchmark details include model version, input shape, compiler flags, clock rate, kernel backend, latency and memory use.
Workloads and hardware starting points
TFLM publishes keyword-spotting and person-detection benchmarks. Its benchmark documentation describes a 250KB Visual Wake Words model; that figure identifies the benchmark model, not a guarantee that the full firmware will occupy 250KB or fit a particular board’s available memory.
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| Board | Documented starting point | What to verify for your project |
|---|---|---|
| Arduino Nano 33 BLE Sense | TensorFlow’s 2021 blog identifies it as compatible with TensorFlow Lite Arduino examples and CMSIS-NN optimizations; it uses a Cortex-M4. | Confirm the specific model’s RAM and flash needs, sensor fit, latency, energy use and toolchain behavior on your build. |
| Coral Dev Board Micro | The TFLM repository lists TFLM and EdgeTPU examples. | Check the model and accelerator path supported by the example, as well as memory use, latency, energy and the toolchain for your build. |
These are starting points, not interchangeable performance guarantees. Choose a board by measured RAM and flash needs, processor and SIMD capabilities, sensor availability, accelerator presence, toolchain, power modes and community support.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.When an accelerator is worth considering
Arm describes Ethos-U55 as targeting area-constrained embedded and IoT inference. In a 2021 TensorFlow blog, Arm expected up to a 480x performance increase for a Cortex-M55 paired with Ethos-U55 compared with previous microcontrollers. This is a vendor-reported projection, not a universal benchmark; actual results depend on the model, hardware and software configuration.
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How to make a useful performance comparison
- Use the same model version, input shape and representative workload when comparing builds.
- State the board and processor, clock rate, compiler flags and kernel backend.
- Report latency and memory use, and include energy when it is relevant to the deployment.
- Measure accuracy after quantization using representative sensor data.
- Distinguish a model-size figure from the complete firmware footprint, and identify benchmark-specific or vendor-projected speedups as such.
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