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Repair common Windows errors and clear accumulated junk for a smoother, more stable PC - no reinstall needed.Free scan · no reinstallEverspin announced a working demonstration of MRAM memory connected over Compute Express Link (CXL), presenting it as a persistent memory tier between conventional DRAM and NAND storage. The system paired Everspin PERSYST 1GB DDR4 MRAM UDIMMs with a CXL controller on an FPGA platform; it shows a way to expose persistent memory to a server, but the announcement does not establish production performance or customer workload gains.
What Everspin demonstrated
In an announcement dated September 29, 2026, Everspin said it demonstrated what it describes as the world’s first CXL-connected MRAM platform at SNIA Developer Conference 2026. The company did not specify the exact date of the conference demonstration. Its design gives a CXL-enabled platform memory-semantic access to PERSYST MRAM, positioning the memory as a persistent tier between DRAM and NAND.
The configuration consisted of:
- A Supermicro AS-1116CS-TN server
- An AMD EPYC 9355 32-core processor
- An AMD Alveo U250 FPGA platform with a Wolley CXL controller
- Everspin PERSYST 1GB DDR4 MRAM UDIMMs
Everspin says it and Wolley demonstrated reads and writes through the CXL interface under demanding test conditions. The announcement does not define those conditions or provide detailed test results. The “world’s first” wording is Everspin’s description, not an independently established industry finding in the announcement. Everspin’s September 29 announcement
How CXL-connected MRAM fits into memory
DRAM is fast working memory but loses its contents when power is removed. NAND-based SSDs retain data without power, but serve storage rather than the same kind of memory access. Everspin’s proposal is to put MRAM in an additional tier: persistent memory that a CXL-enabled host can access through a memory interface.
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MRAM retains data without power. Everspin says its CXL setup can make that persistent memory available without battery-backed DRAM or first flushing data to an SSD. The announcement also describes the potential to pool memory resources and share them across hosts. It does not specify the pooling implementation, supported host configurations, or measured latency and bandwidth.
What the “up to 100x” claim means
Everspin claims writes can be up to 100 times faster than NAND-based solid-state storage. The announcement does not name a comparison drive, describe the workload or test method, or publish underlying results. Treat the figure as a vendor headline claim, not a general result for all NAND devices or workloads, and not independent proof of performance in a deployed system. Everspin’s announcement
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Potential AI uses—and what remains unproven
Everspin identifies AI checkpointing and persistent key-value (KV) cache as possible applications. Keeping data in a persistent memory tier could be useful for workloads that need fast access to state that should survive a restart or power interruption. But the announcement includes no customer case study, AI workload measurements, or evidence of improved training or inference results.
Everspin CEO Sanjeev Aggarwal said customers can run their own workloads and measure the benefit for their applications. That makes application-specific testing the next step, rather than a demonstrated result of this announcement.
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What the announcement does not establish
- Independent performance validation: The published “up to 100x” comparison lacks detailed benchmark methods and results.
- Production deployment: No customer deployment or adoption information is included.
- Broad compatibility: The demonstration names its server, processor, FPGA platform, controller, and MRAM modules, but does not document compatibility with other systems.
- Availability of the demo modules: The release gives no price, ordering channel, or evaluation terms for these specific UDIMMs. Everspin’s design-support page lists evaluation hardware and software for some MRAM products, but does not establish that the demo modules are available. Everspin design support
What to look for in a practical evaluation
For organizations considering this approach, the announcement leaves several engineering questions open. A useful evaluation would measure the behavior of the actual application and platform rather than relying on a headline comparison alone.
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- Latency and bandwidth under the target workload, including sustained reads and writes
- Data-retention behavior through power loss and system restart
- Capacity limits and how pooling or sharing works across hosts
- Compatibility with the intended server, processor, CXL controller, and software stack
- Evaluation access and production availability for the exact memory modules
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