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Yes. The NXP i.MX 95 integrates NXP’s eIQ Neutron neural processing unit (NPU), which NXP describes as a machine-learning accelerator. That supports calling the integrated NPU NXP-developed; it does not establish who created or owns every underlying IP block.

Who makes the i.MX 95 NPU?

NXP says the i.MX 95 is the first i.MX applications processor family to integrate NXP’s eIQ Neutron NPU. Its news release also identifies a new image signal processor (ISP) developed by NXP. Read NXP’s announcement.

The attribution is specific: NXP identifies eIQ Neutron as its NPU. The available product information does not document the provenance or ownership of every component or underlying IP block, so it does not support a broader claim that every part of the processor was developed in-house.

What is the NPU for?

NXP positions eIQ Neutron as a scalable accelerator architecture for machine-learning workloads. One example is machine vision: NXP describes a vision pipeline that can use multiple camera sensors or network-attached smart cameras. NXP also says the i.MX 95 supports Neutron acceleration for speech-to-text workloads.

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Those examples indicate intended use, not a guarantee that any particular model or application will run unchanged. The cited material does not specify supported model formats, quantified throughput, or benchmark results. Developers evaluating a workload should verify software and model compatibility and measure performance on their target configuration.

How does the NPU fit into the processor?

The NPU is one part of a broader edge-processing platform. NXP lists six Arm Cortex-A55 cores, one Arm Cortex-M7, one Arm Cortex-M33, and the eIQ Neutron NPU in the i.MX 95 family. Its product positioning also includes functional safety, security, graphics, and high-speed connectivity. See NXP’s i.MX 95 product information.

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NXP identifies the family for aerospace, automotive edge, commercial IoT, industrial, medical, and network platforms. These are application areas, not proof that every i.MX 95 configuration is certified or suitable for every product in those sectors; requirements depend on the specific design and use case.

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How can developers evaluate the i.MX 95?

NXP lists the IMX95LPD5EVK-19, a 19 mm × 19 mm i.MX 95 Evaluation Kit, as an active evaluation and development board. It is a starting point for hands-on development, but NXP’s listing establishes the kit’s existence—not current retail inventory, price, or availability from a particular seller.

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For a meaningful NPU evaluation, test the intended model and software on the target board and workload. Record performance and power under the conditions relevant to the final product, and check camera-pipeline, connectivity, safety, and thermal requirements where they apply. The cited NXP materials do not provide comparable benchmark data or a basis for ranking the i.MX 95 against competing platforms.

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What is not established about eIQ Neutron?

  • No NPU throughput figure, such as TOPS, is established in the cited material.
  • No power comparison, latency result, or independent benchmark is provided.
  • Detailed NPU microarchitecture and supported model formats are not specified.
  • The material does not compare NXP’s NPU IP with third-party NPU IP.

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