Cadence Design Systems acquired Azuro in July 2011, adding clock concurrent optimization technology aimed at improving power, performance and area (PPA) outcomes in system-on-chip (SoC) design. The purchase price was not disclosed, and the available reporting does not establish the technology’s current Cadence product name or availability.
What was Azuro?
Azuro was a Santa Clara, California-based electronic design automation (EDA) company focused on clock concurrent optimization for SoC design. In reporting published July 12, 2011, EE Times described Azuro’s technology as intended to improve power, performance and area results. That was a description of the technology’s intended capability, not a quantified or independently verified outcome.
When did Cadence acquire Azuro?
Cadence acquired Azuro in July 2011. EE Times reported the deal on July 12, 2011, and Cadence’s 2024 annual report later confirmed the month and year, describing Azuro as a clock concurrent optimization company. The report also identifies Paul Cunningham, later a Cadence executive, as Azuro’s co-founder and CEO.
What does clock concurrent optimization do?
Clock concurrent optimization is a design-flow capability that considers clocking and logic optimization together during digital implementation. It is not a physical chip component or a consumer product. The aim is to account for clock behavior while optimizing a design, with power, performance and area as the relevant outcome dimensions. The acquisition coverage described those benefits but did not give measured results or performance percentages.
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- Zybo Z7 comes in two APSoC variants: Zybo Z7-10 features Xilinx XC7Z010-1CLG400C. Zybo Z7-20 features the larger Xilinx XC7Z020-1CLG400C. Either variant also has the option to add the SDSoC voucher.
- A feature-rich, ready-to-use embedded software and digital circuit development board with a rich set of multimedia and connectivity peripherals to create a formidable single-board computer
- Built around the Xilinx Zynq-7000 AP SoC, with 650MHz dual-core Cortex-A9 processor and DDR3 memory controller with 8 DMA channels
- On board user interfaces include 6 push buttons, 4 slide switches, 5 LEDs, 2 RGB LEDs, and more
- Expansion opportunities with six Pmod connector ports, over 30 FPGA I/O, four Analog capable 0-1.0V differential pairs to XADC, and more
Why did Cadence acquire Azuro?
Cadence presented the acquisition as a way to strengthen its digital implementation tools for next-generation SoCs. As chip designs grow more complex, clocking decisions interact with the implementation of logic; Azuro’s focus fit that part of the design process. The public reporting establishes the strategic and technical fit, but does not provide a detailed integration roadmap.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.What were the deal terms and what happened to the technology?
EE Times reported that the financial terms were not disclosed and that key Azuro management and technical staff would be retained. It also said Cadence planned to make the technology available to its customers immediately as an upgrade. That 2011 account does not establish which current Cadence product, if any, contains the technology, its present branding, or whether it remains separately available.
Quick Recap
Rank #4
- ZYNQ-7000 ARM+FPGA SoC: Powered by Xilinx ZYNQ XC7Z010/020 with dual-core ARM Cortex-A9 and programmable logic—ideal for embedded and FPGA development.
- Integrated Interfaces for Versatile Applications: Features HDMI, USB 2.0 Host, UART, JTAG, Gigabit Ethernet (PS & PL), SD card, and 40-pin expansion for AD/DA, LCD, and camera modules.
- Robust Memory & Storage: Equipped with 512MB/1GB DDR3, 128Mb QSPI Flash, 64Kbit EEPROM, and boot selection via JTAG/QSPI/SD for flexible design setups.
- Industrial-Grade Design: Compact 90x60mm board with immersion gold finish, suitable for industrial environments. 5V/1A power input supports stable operation.
- Support for Linux and Hardware Demos: Supports embedded Linux system, MIPI CSI camera input (7020 only), and comes with HDL demos—perfect for research and education.
Rank #3
- Arty A7 comes in two FPGA variants: Arty A7-35T features Xilinx XC7A35TICSG324-1L. Arty A7-100T features the larger Xilinx XC7A100TCSG324-1.
- Internal clock speeds exceeding 450MHz, On-chip analog-to-digital converter (XADC), Programmable over JTAG and Quad-SPI Flash
- 256MB DDR3L with a 16-bit bus @ 667MHz, 16MB Quad-SPI Flash, USB-JTAG Programming circuitry, Powered from USB or any 7V-15V source
- 10/100 Mbps Ethernet, USB-UART Bridge
- 4 Switches, 4 Buttons, 1 Reset Button, 4 LEDs, 4 RGB LEDs, 4 Pmod connectors, shield connector
Rank #2
- Zybo Z7 comes in two APSoC variants: Zybo Z7-10 features Xilinx XC7Z010-1CLG400C. Zybo Z7-20 features the larger Xilinx XC7Z020-1CLG400C. Either variant also has the option to add the SDSoC voucher.
- A feature-rich, ready-to-use embedded software and digital circuit development board with a rich set of multimedia and connectivity peripherals to create a formidable single-board computer
- Built around the Xilinx Zynq-7000 AP SoC, with 650MHz dual-core Cortex-A9 processor and DDR3 memory controller with 8 DMA channels
- On board user interfaces include 6 push buttons, 4 slide switches, 5 LEDs, 2 RGB LEDs, and more
- Expansion opportunities with six Pmod connector ports, over 30 FPGA I/O, four Analog capable 0-1.0V differential pairs to XADC, and more
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