Do these 3 things before closing this tab:
1Fix the driver behind crashes, sound loss and screen glitches2Repair Windows errors before they cause bigger problems3Scan for outdated or missing drivers - takes under a minuteIn Michael Kohn’s FPGA experiment, the 68000 core finished a Mandelbrot workload faster than the x86 core—but that result applies to two small, non-pipelined implementations, not to the architectures in general. A key difference was their memory interface: the 68000 fetched over 16 bits, while the x86 fetched over 8 bits.
What the FPGA comparison actually tested
Kohn implemented a minimal 32-bit x86 core, called micro86, and a Motorola 68000 core, micro68k, on an iCE40-HX8K FPGA fitted to an IceFUN board. The cores each have 8 KiB of RAM, 4 KiB of ROM, and SPI and other I/O support. Neither is pipelined, and both omit instructions, so they are educational, task-focused designs rather than complete compatibility implementations.
The main workload was a Mandelbrot generator assembled separately for each processor. Hackaday reported that the two CISC versions produced practically identical code sizes, while the 68000 version completed the workload faster. The comparison therefore answers how these particular cores handled this program; it does not establish a general performance ranking.
Why the 68000 ran this workload faster
Instruction fetch and bus width
The clearest implementation-level difference is the width of the memory-fetch path. Micro86 fetches instructions over an 8-bit data bus; micro68k uses a 16-bit bus. In Kohn’s example, an x86 instruction with two opcode bytes and four immediate-data bytes takes six memory fetches. A 68000 instruction with one opcode word and two data words takes three.
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Fewer fetches can help the 68000 core keep instruction execution moving, particularly when the competing core must retrieve the same kind of instruction information over a narrower path. But this is a comparison of these two bus designs—not a property that makes every 68000 implementation twice as fast as every x86 implementation.
Encoding and code size
The x86 instruction stream is variable-length: instructions can combine opcode bytes with additional addressing or immediate data. Kohn describes x86 as feeling “more like a compression scheme.” That flexibility can represent operations compactly, but decoding variable-length instructions adds work for a simple core. In the Mandelbrot test, the resulting x86 and 68000 program sizes were practically identical, according to Hackaday; the 68000’s speed advantage was not a case of it producing a substantially smaller program.
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Pipeline and workload limits
Neither core has a pipeline, and the test covers one Mandelbrot program. The x86 design’s 8-bit fetch path is an evident throughput constraint in this implementation, but the result does not isolate bus width from every other design choice. It should not be read as an intrinsic speed comparison between instruction sets, much less between modern x86 processors and classic 68000s.
Architectural differences that matter in a small FPGA core
| Aspect | micro86 x86 implementation | micro68k implementation |
|---|---|---|
| Register model | Eight semi-specific registers; segmentation registers constrain memory access. | Eight 32-bit data registers and eight 32-bit address registers. |
| Addressing and operations | Variable-length instructions; implementation omits many rarely used instructions. | Broad addressing modes and 32-bit ALU operations; implementation also omits instructions. |
| Byte order | Little-endian. | Big-endian. |
| Instruction fetch bus | 8 bits in Kohn’s implementation. | 16 bits in Kohn’s implementation. |
| Pipeline | None. | None. |
| Benchmark result | Completed the Mandelbrot workload after the 68000 implementation in the reported comparison. | Completed the Mandelbrot workload faster than the x86 implementation in the reported comparison. |
The 68000’s separate data and address register sets, broad addressing modes, and 32-bit operations make it a distinct design to implement; they do not make every task automatically simpler. Conversely, x86’s variable-length encoding and segmentation add design considerations, but the project’s results alone do not quantify an architecture-wide implementation-effort difference.
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How complete are these soft cores?
Neither Kohn core should be treated as a full processor implementation. The micro68k repository lists arithmetic, branches, moves, addressing, shifts, rotates, traps, and status-register operations among its implemented operations. It also identifies several memory-shift, exchange, push-effective-address, and condition-code operations as unimplemented. Its documented four-bank map includes 4 KiB RAM, 4 KiB ROM, peripherals, and another 4 KiB RAM bank.
That scope matters when choosing a core for existing software: a program may depend on an instruction, exception behavior, or compatibility detail that a minimal educational implementation does not provide. The available micro68k project documentation does not establish a comparable instruction-by-instruction completeness list for micro86, so it is not possible to make a balanced count of implemented operations for the two cores.
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Other 68000 FPGA options
| Project | What it offers | Reported implementation details | Best fit |
|---|---|---|---|
| micro68k | Small, educational 68000 soft core with documented omissions and a simple memory/peripheral map. | Kohn’s iCE40-HX8K/IceFUN project. LUT and block-RAM use are not stated in the cited project summary. | Studying a compact core or reproducing Kohn’s comparison. |
| J68 | Reports all 68000 instructions implemented; microcoded and not cycle exact. | About 1,900 LUTs plus eight M9K blocks, and a reported maximum frequency of 90 MHz on Cyclone III. | Higher-level retrocomputing where full instruction coverage matters more than transistor-level timing compatibility. |
| Mackerel-F | A larger system using the fx68k soft 68000 core, with SDRAM, UART, timer, interrupt controller, microSD, Ethernet, and NOMMU Linux. | Tang Nano 20k FPGA build; documented core clock is 37.8 MHz. LUT and block-RAM use are not stated in the cited project summary. | Exploring a broader FPGA computer and Linux-capable system rather than a minimal CPU-only experiment. |
These figures describe different projects and platforms. J68’s Cyclone III frequency and resource figures are not directly comparable with Mackerel-F’s documented clock or the micro68k benchmark: the cores, FPGA families, surrounding systems, and reported measurements differ. The figures are not a standardized performance test.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.What board do you need to reproduce the comparison?
The direct hardware target is an iCE40-HX8K FPGA development board in the IceFUN class, as used by Kohn. The Tang Nano 20k is a documented alternative for the substantially larger Mackerel-F 68000/Linux system, not a drop-in substitute established by this comparison. Board revisions, toolchain compatibility, availability, and prices can change; confirm those details against the relevant project documentation and current vendor listings before choosing hardware.
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To reproduce the original result meaningfully, use the same core implementations and workload, and keep the comparison conditions aligned. In particular, record the FPGA board and revision, core clock settings, memory configuration, and exact Mandelbrot program and output criterion. The available comparison does not provide a standardized benchmark across fully featured x86 and 68000 FPGA cores, so changing a core or platform can change the result.
Quick Recap
How to interpret the result
- The reported winner is specific: micro68k completed Kohn’s Mandelbrot workload faster than micro86.
- The 16-bit versus 8-bit memory-fetch paths are a major confounding factor, alongside differences in instruction encoding and implementation.
- Both cores are minimal and non-pipelined, and the benchmark is a single workload.
- For a complete 68000 instruction set, J68 reports broader coverage; for a Linux-oriented system, Mackerel-F demonstrates a larger integration. Neither alternative supplies a standardized x86-versus-68000 benchmark.
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