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Probably not for A12 or A13, and possibly not until a later, roughly 1nm-class node. TSMC says it intends to begin high-volume manufacturing with High-NA EUV for advanced nodes in 2030, but has not named the first process. A10 or A11 are reported as plausible candidates—not confirmed TSMC plans. So “wait until 1nm” is a reasonable shorthand, not an announced node-by-node commitment.
What has TSMC actually announced?
On September 8, 2026, TSMC and ASML said TSMC intends to use ASML High-NA technology in high-volume manufacturing (HVM) for advanced nodes starting in 2030. Their announcement also set later milestones for larger photomasks and production readiness. It did not identify the first High-NA node or say that TSMC has already purchased a particular number of scanners.
That distinction matters: a target adoption date is not the same as a named process node, a completed tool order, or proof that a node has entered volume production. The public statement establishes TSMC’s intended timeframe; the first node remains undisclosed.
Will TSMC use High-NA EUV for A12 or A13?
Roadmap reporting places A12 and A13 in 2029 and says neither requires High-NA EUV. TSMC’s position is that it can continue scaling with current, Low-NA EUV rather than move to the newer scanners immediately. The reported roadmap also describes A13 as using an optical shrink that reduces area by about 6%; that figure is a roadmap claim, not evidence that the process uses High-NA.
Kevin Zhang, TSMC’s senior vice president of business development and global sales and deputy COO, told Tom’s Hardware that TSMC’s R&D teams had continued to scale technology without High-NA, adding that the company was still harvesting benefits from current EUV and that High-NA was “very, very expensive.” His comments explain the near-term choice: adopt a more costly lithography platform when existing tools and process techniques no longer provide the needed scaling or economics.
Does “wait until 1nm” mean A10 or A11?
Not as an official TSMC designation. Analysis of the roadmap identifies A10 or A11—described as roughly 1nm- or 1.1nm-class processes—as the strongest reported candidates for the first High-NA node. That is an inference from the likely timing and scaling roadmap, not a confirmation from TSMC or ASML.
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Node names are not a direct measurement of a single physical feature, so “1nm” should be read here as a process-generation label. The careful version of the claim is that TSMC’s currently reported plan leaves A12 and A13 without a High-NA requirement, while a later generation around the 1nm class could be where the technology enters HVM. The company has not publicly pinned that transition to A10, A11, or another named node.
Why is TSMC delaying High-NA EUV?
The resolution gain has to justify the full cost
High-NA EUV offers approximately 8nm single-exposure resolution, compared with about 13nm for current Low-NA EUV, according to Tom’s Hardware’s 2026 reporting. Finer resolution can make some patterns possible with fewer patterning steps, but the benefit depends on the process. It must outweigh scanner cost, changes to the fab and mask ecosystem, and any productivity penalty.
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Reuters reported in 2026 that a High-NA machine can cost up to $400 million. That is a reported maximum per tool, not a disclosed TSMC purchase price. For a manufacturer planning high-volume production, the decision is about more than whether the scanner can print finer features: the tool must deliver enough usable wafer output and process simplification to earn back a very large capital investment.
Current masks create a field-size and stitching trade-off
With conventional 6-inch masks, High-NA scanners have half the exposure field of Low-NA tools. A smaller field can mean that a large die cannot be exposed in one shot, creating a need to stitch exposures together. Stitching adds process and design complexity and can make productivity harder to achieve, especially for large dies.
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ASML CEO Christophe Fouquet described the expected transition as progressive: first using current 6-inch masks, then gaining further scanner productivity with 12-inch masks. The TSMC-ASML initiative targets a 12-inch photomask pilot line by 2031, so that mask milestone is part of the longer-term ecosystem plan—not a claim that TSMC’s first High-NA production in 2030 will already use 12-inch masks.
What is the reported timeline?
| Year | Milestone | What it means |
|---|---|---|
| 2029 | A12 and A13 planned; neither is reported to require High-NA EUV. | TSMC expects to continue its near-term scaling roadmap without High-NA. |
| 2030 | TSMC intends to begin High-NA EUV HVM for advanced nodes. | The first node has not been named. |
| 2031 | A 12-inch photomask pilot line is targeted by the TSMC-ASML initiative. | A development milestone intended to support later productivity improvements. |
| 2033 | 12-inch High-NA lithography systems are targeted to reach advanced-node production readiness. | A later readiness target; it does not replace the separate 2030 HVM intention. |
When will TSMC buy ASML High-NA machines?
The public announcement gives an intended HVM start in 2030, not a public delivery or purchase schedule. The source material does not establish how many scanners TSMC has ordered, when any individual machine will arrive, or whether a purchase agreement has been completed. It is therefore more accurate to say that TSMC has announced an intention to use High-NA in advanced-node HVM from 2030 than to claim that it will buy a specified number of machines in a particular year.
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What to watch for next
- A named first node: TSMC or ASML identifying which process generation will use High-NA would turn the A10/A11 inference into a confirmed roadmap detail.
- Tool and production disclosures: Purchase, installation, or qualification announcements would clarify the gap between the 2030 intention and actual ramp timing.
- Mask-format progress: The targeted 2031 12-inch photomask pilot and the 2033 production-readiness goal will indicate whether the industry can address the field-size and productivity constraints over time.
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