On April 2, 2019, Lauterbach announced TRACE32 kernel awareness for SAFERTOS on Arm processors. The release described debugger views for kernel resources, tasks, trace listings and run-time performance, and said the configuration needed no extra target setup or operating-system hooks or patches. That is a historical product-support statement, not confirmation of current SAFERTOS compatibility or package availability.
What Lauterbach announced
The April 2, 2019 release described SAFERTOS awareness as an addition to TRACE32, Lauterbach’s debug and trace toolchain. It was intended to help developers inspect and debug targets running SAFERTOS on Arm processors. Lauterbach said the release provided a ready-to-run configuration for the real-time kernel and required no additional target configuration or hooks or patches in the OS. Those details describe the announced package at that time; they do not establish support for every Arm target or later software release.
What the awareness was designed to show
According to the announcement, TRACE32’s SAFERTOS-specific support exposed kernel state and performance information through these features:
- SAFERTOS system resources and task information.
- Dynamic measurement of thread performance.
- SAFERTOS-specific trace listings.
- Statistical evaluation and graphical displays of task and function run time.
- PRACTICE functions for accessing operating-system data, plus a SAFERTOS-related pull-down menu.
Lauterbach’s general explanation of OS awareness says debugger support for a selected operating system uses kernel symbols to access kernel structures and adds commands and views for examining OS state. Its general page says TRACE32 supports more than 80 operating systems overall, but does not confirm the current status of SAFERTOS awareness or its compatibility with specific releases: Lauterbach’s OS-awareness overview.
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- This hardware supports USB to UART and JTAG, and the voltage supports 1.8V 3.3V 5V.Support standard JTAG interface and 2-wire SWD debugging interface.
- The Jtag main control chip uses STM32F205, can not afford to lose the firmware, hardware upgrade to the latest version of V9.4, can provide 3.3V voltage of 0.8A.
- Stable and reliable chipset CP2102,Baud rates: 300 bps to 1.5 Mbps,Connect MCU easily to your computer!Standard USB type A male and TTL 5pin connector. 5pins for 3.3V, RST, TXD, RXD, GND & 5V.
- Support IAR KEIL MDK,nRF51822 nRF52810 NRF52832 JLINK V9 DA14580 JLINKV9 SDW Emulation Debugger ARM Jtag Debugger Supports MDK/IAR/KEIL. Supports debugging of all ARM chips, supports MDK or IAR, and compile environment IDE supported by other standard J*Link standards.
- Kind reminder: Our device is designed for experienced embedded engineers or enthusiasts who know how to use it. Please refer to the pictures on this webpage for instructions. We apologize for not providing any additional product user manuals!
What the announcement said about safety certification
The 2019 release described SAFERTOS as available pre-certified to IEC 61508 SIL 3 and ISO 26262 ASIL D. This is wording from Lauterbach’s historical announcement, not an independent or current verification of certification status. The announcement did not present a statistical study or quantified performance benchmark for TRACE32 awareness.
What is known about later support—and what is not
Lauterbach’s archive includes a June 8, 2020 item about TRACE32 extending support for SAFERTOS v8. That is evidence of a later historical support announcement, not proof that the same package is available today or that it supports any particular current TRACE32, SAFERTOS or Arm release: Lauterbach news archive.
Rank #2
- Compatible With full range of devices: Xilinx FPGAs, XILINX Zynq-7000, XILINX CoolRunnerTM/CoolRunner-II CPLDs, Artix7, SOC, Xilinx Platform Flash ISP configuration PROMs, Select third-party SPI PROMs, Select third-party BPI PROMs, etc. Adaptive target board I/O voltage, support 5V, 3.3V, 2.5V, 1.8V and 1.5V interface levels, VREF levels range from 1.4V to 5V. The measured minimum can support up to 1.2V, and an interface protection circuit is added.
- Support for new devices and new versions of software is also a future use trend. The downloader has been mass-produced and tested for a long time, and the quality is stable and reliable.
- Fast download speed: up to 30M. Speeds faster than Platform cable USB I and II generations. It is recommended to use ISE14.1 or above software with its own driver..Support impact, Chipscope, EDK, Vivado2014 and above, Including software such as Vivado2018.
- The JTAG download clock Compatible With the adaptation of XILINX software, and can also be manually selected. 6. Support all operating systems, XP, WIN7, WIN8, WIN10 system and Linux system.
- Pckage include:FPGA ProgrammmerCable*1,adapter*1,14pin cable*2,10pin cable*1,7pin cable*1,7pin dupont cable*1
Lauterbach’s general OS-awareness explanation describes how its debugger support works, but does not supply a current SAFERTOS compatibility matrix or licensing terms. The 2019 release also does not identify current package availability, supported TRACE32 and SAFERTOS versions, or a complete list of compatible Arm targets.
What to verify before using it
For a present-day engineering or procurement decision, confirm the specifics with Lauterbach and WITTENSTEIN high integrity systems rather than relying on the 2019 announcement. Ask about:
Rank #3
- USB to FPGA Interface: The USB Blaster Download Cable interfaces a USB port on a host computer to an Altera FPGA mounted on a printed circuit board
- Configuration Data Transfer: The cable sends configuration data from the PC to a standard 10-pin header connected to the FPGA
- Versatile Programming Applications: You can use the USB Blaster cable to iteratively download configuration data to a system during prototyping or to program data into the system during production
- Comprehensive Device Support: Supports most of the ALTERA FPGA/CPLD devices, Active Serial Configuration devices, Enhanced Configuration devices, and supports AS, PS, JTAG three download modes
- High-Speed Design Architecture: Features high-speed, stable performance with internal FT245R+CPLD design for efficient programming and debugging operations
- The TRACE32 release and SAFERTOS version you plan to use.
- The exact Arm processor or target configuration.
- Whether the SAFERTOS awareness package is currently available for that combination.
- Any licensing requirements and the configuration steps for your setup.
How the partners described the release
Andrew Longhurst, Business Manager at WITTENSTEIN high integrity systems, said the new TRACE32 awareness was “a great help to our customers,” enabling “leading kernel aware debugging for SAFERTOS.” Lauterbach RTOS specialist Rudi Dienstbeck said the partnership was intended to support engineers developing secure systems. These are statements from the announcement’s partners, not independent evaluations of the tools.
Quick Recap
Rank #4
- Category:XILINX FPGA/CPLD configuration and programming Cable
- Software:Xilinx ISE, iMPACT, ChipScope
- Interfaces:JTAG, Slave-Serial and SPI
- Solution:CY7C68013A+XC2C256
- User Guide CD?schematic,software, drivers and examples
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