The Heath Robinson Rube Goldberg (HRRG) computer is a proposed educational computer built as a collection of glass-fronted wooden cabinets, with each cabinet demonstrating a different way to perform a computer function. Rather than hiding the machine’s workings on one board, the concept makes its clock, processor, memory and input/output visible—and leaves room for relays, vacuum tubes, switches, magnetic cores, fluidics and other technologies.
The later design is 4-bit: its data bus and stored words are four bits wide. Its modest scale is intentional, making the logic easier to study while the cabinet-based approach turns computer architecture into something visitors can see. It is a design project, not a documented, completed public computer; the cited accounts describe plans and supporting software, not a finished machine with established speed, cost or completion date.
What is the HRRG computer?
HRRG stands for Heath Robinson Rube Goldberg. The name joins British illustrator William Heath Robinson (1872–1944) and American cartoonist Reuben Lucius Goldberg (1883–1970), both associated with elaborate contraptions that accomplish simple tasks through a chain of mechanisms. Project co-designer Clive “Max” Maxfield describes the name as an homage to the two artists on the original HRRG project page.
The computer takes that spirit literally: it is imagined as a row of cabinets, each with a glass front and a distinct job. A clock might be visibly mechanical, a ROM might use switches, and input or output might involve flags, tones or moving mechanisms. The aim is not merely to make computation work, but to make its parts and operation understandable and engaging.
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That makes HRRG different from a conventional single-board computer. It is a modular design concept whose cabinets would have to cooperate as a system, using shared addressing and communication arrangements. The original proposal even considers wireless links between cabinets rather than bundles of connecting cables; Maxfield describes that idea in a 2022 retrospective.
Why is the design 4-bit?
The project was first imagined as an 8-bit computer, then reduced to 4 bits to make an educational build more approachable. In the architecture discussion, “4-bit” refers to the width of the data bus and the stored data words—not to every connection in the machine. The CPU also has address and control buses, which carry different kinds of information. The distinction is described in the ground-up architecture article.
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A four-bit word can represent 16 possible patterns, from 0000 through 1111. That is enough to demonstrate how data is represented and manipulated, while keeping the basic data path small enough to examine directly. The design discussion considers starting with primitive 7400-series TTL gates and flip-flops rather than concealing the logic inside a prebuilt ALU. That choice favors seeing how the processor’s operations are constructed over maximizing convenience or capability.
What would the cabinets do?
The project page lays out possible system functions and implementation ideas rather than a final build specification. The technologies below are proposals, not a claim that each cabinet has been completed or that the listed options are interchangeable without engineering work.
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| Cabinet or function | Proposed implementations and role |
|---|---|
| System clock | An antique pendulum clock with an optical sensor could provide timing, with frequency multiplication or division as options. A Jacob’s Ladder clock is suggested as a more theatrical alternative. Both concepts appear on the HRRG project page. |
| ROM | Banks of up/down switches could encode words or bytes. Address-range settings are proposed so multiple ROM cabinets—and potentially different implementations—can coexist. A plug-panel ROM is another idea. |
| CPU and ALU | Possible logic technologies include relays, vacuum tubes, transistors and 7400-series integrated circuits. The ground-up design discussion also considers primitive TTL gates and flip-flops as a way to expose the underlying logic. |
| RAM and other memory | The project page considers pneumatic, fluidic, delay-line and magnetic-core approaches. Ferromagnetic cores are also mentioned in connection with magnetic logic and memory. |
| Control, status and addressing logic | These are among the computer functions contemplated for cabinets. The cited material does not specify a final implementation for each one. |
| Input and output | Possible outputs include flags, puppets, fountains, tones and other mechanisms. They are intended to make the machine’s activity demonstrable as well as functional. |
The switch-based ROM illustrates the project’s practical, educational bent. Maxfield quotes an email from Paul in New Boston, New Hampshire, who remarked, “Sure, an arrangement of switches makes perfect sense.” A simple-looking cabinet can serve a real architectural purpose while making stored values tangible.
Is HRRG a working computer, or only a concept?
The material cited here establishes HRRG as a proposed mixed-technology educational computer, but does not establish a completed public machine. The 2022 retrospective describes a system-clock cabinet, a CPU cabinet and memory cabinets as parts of the design. It says a hobbyist or student could build a memory cabinet containing as little as one 4-bit word, and reports that a PC emulator, custom assembly language and assembler had been created. It also describes an FPGA implementation effort involving Joe Farr, Clive Maxfield and Nils van den Heuvel.
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Those software and FPGA efforts are useful signs that the idea was being explored beyond sketches, but they are not evidence that a complete cabinet-based HRRG computer was finished. The cited accounts do not establish a final price, operating speed or definitive completion date. They also do not provide a measured comparison of the candidate hardware technologies.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.Could you build or simulate one?
The project’s modular concept gives a builder more than one possible starting point. A single memory cabinet holding one 4-bit word is the smallest specific educational build described in the 2022 retrospective. The same article reports the existence of a PC emulator, custom assembly language and assembler, offering a way to engage with the computer’s instruction-level design without first constructing physical cabinets.
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A physical implementation would still need to follow the system’s shared architecture: each cabinet must fit into the addressing and communication scheme, and the clock, CPU, memory and I/O must work together. The source material presents potential technologies, not complete build instructions, a final bus specification or a verified parts list. A cabinet idea is therefore a starting point for an architectural and engineering project, not a plug-and-play recipe.
For someone choosing among the proposed approaches, the useful questions are practical as well as historical:
- How visible should the logic be? Primitive gates and flip-flops foreground how functions are built; a prebuilt function can simplify an implementation but reveals less of its internal logic.
- What should the cabinet demonstrate? Relays, tubes, switches or mechanical and fluidic mechanisms can make different aspects of computation visible, but the sources do not supply comparative performance or cost measurements.
- Can it be integrated safely and reliably? Electrical power, mechanical complexity, component availability and safety requirements depend on the chosen implementation and need to be assessed for that build.
- How will it communicate with the rest of the machine? A cabinet must fit the shared bus and addressing arrangement; visual appeal alone does not make it a functioning system component.
- Would simulation answer the immediate question? The reported emulator and assembler provide a software route to explore the architecture before tackling cabinet hardware.
How does HRRG relate to early computers?
The project page invokes earlier computers to convey the visible, physical character of computing hardware, but HRRG is not presented as a recreation of any one historic machine. Its examples range in scale: the Harvard Mark 1 is described there as 50 feet long, 8 feet tall and containing more than 750,000 individual components, based on Maxfield’s cited historical account of its 1939–1944 construction. The same page describes ENIAC as having 18,000 vacuum tubes and weighing 30 tons, with construction at the University of Pennsylvania from 1943 to 1946. These are historical figures as reported on the project page, not specifications for HRRG.
At a different scale, the page describes the CDC 6600 Deadstart Panel as holding 12 words, each 12 bits wide; the Control Data Corporation machine dates to 1964. The comparison helps explain the appeal of switches and panels: they can expose stored information directly. HRRG carries that visibility into a modular educational design rather than trying to reproduce the size or capability of those earlier systems.
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