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Brion Technologies announced Tachyon 2.0 on February 26, 2007, as a computational-lithography platform for optical proximity correction (OPC) and OPC verification at 45 nm and below. It paired general-purpose CPUs with FPGA accelerators, using image-based simulation to model how patterns would print and to help correct mask layouts. Brion and contemporaneous trade publications claimed substantially higher simulation capacity than the first Tachyon, but the reported figures were not accompanied by an independent benchmark methodology.
Why OPC mattered as chip features shrank
A photomask pattern does not transfer perfectly onto a silicon wafer. At small dimensions, diffraction and interference can change the printed shape: a line may narrow, a corner may round, or nearby features may affect one another. Optical proximity correction adjusts the mask pattern so the resulting wafer image is closer to the intended circuit geometry.
That correction depends on predicting the printed image accurately across a chip. A simulation that accounts for a wider neighborhood of interacting features can represent optical effects that a narrowly local model might miss. More detailed simulation, however, takes computing resources, especially when applied across a full design and checked for manufacturability.
What Tachyon 2.0 combined
Software modeling with FPGA acceleration
Tachyon 2.0 was not just a software package or a standalone accelerator card. Brion described it as an integrated hardware-and-software system combining general-purpose CPUs with field-programmable gate arrays (FPGAs). The CPUs supplied general compute, while FPGA acceleration was intended to handle computationally intensive simulation tasks. The available contemporary descriptions do not provide enough detail to quantify how work was divided between the two.
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Image-based simulation over a wider optical ambit
Brion’s approach used image-based simulation, larger optical ambits, and multiple convolution kernels to model interactions among features. EE Times reported that Tachyon 2.0 could use optical ambits up to 4 microns for 45-nm designs and run up to 256 convolution kernels simultaneously. An optical ambit is the region considered around a feature when estimating its optical interactions; a larger ambit can capture effects from features farther away than the nearest adjacent line.
Jim Wiley, then Brion’s senior technical director, said that OPC remained a significant source of manufacturing errors and argued that larger ambits and more kernels could improve simulation and manufacturing accuracy. That is the rationale Brion gave for the design, not independent proof of a particular yield or accuracy improvement.
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What the reported performance figures do—and do not—show
| Reported figure | What it referred to | Qualification |
|---|---|---|
| Four times the simulation/modeling power | Tachyon 2.0 compared with the original Tachyon | Brion claim reported by EE Times and Electronic Design in 2007; no independent benchmark methodology is provided in those accounts. |
| Up to 256 simultaneous convolution kernels | Simulation capacity | Reported by EE Times in 2007; this is a maximum capability, not a measure of throughput on every design. |
| Optical ambits up to 4 microns | Optical interaction range used for 45-nm designs | Reported by EE Times and Electronic Design in 2007; not a claim that every design or process used that maximum range. |
| One Tachyon 2.0 rack could provide the production capacity of four first-generation racks | Production capacity per rack | Reported by Electronic Design in 2007 as a Brion claim; the account does not establish a neutral, reproducible comparison. |
These figures describe different things: modeling power, a maximum kernel count, a simulation range, and claimed rack-level production capacity. They should not be combined into a single guaranteed speedup. The contemporary reporting does not establish a neutral head-to-head result against software-only OPC systems, nor does it give enough test conditions to predict performance on a particular fab’s workloads.
How it fit 45-nm and later process work
45-nm OPC and verification
Tachyon 2.0 was announced for OPC and OPC verification at 45 nm and below. The surrounding manufacturing work was not limited to a product announcement: the Crolles2 collaboration covered 65-nm manufacturability verification and 45-nm OPC development. Those are separate process activities, so the 65-nm verification work should not be read as evidence that the 45-nm correction claims applied identically at every node.
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- STEM Education & Technology Demonstration: Ideal for classrooms, laboratories and technology demonstrations, helping students, engineers and enthusiasts explore semiconductor wafers, integrated circuits and semiconductor manufacturing concepts.
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ASML later reported that Chartered adopted Tachyon OPC+, LMC, and resolution-enhancement products for 45 nm and below, and that STMicroelectronics used OPC+ and LMC in 45-nm production. These examples place Brion’s technology in foundry and integrated-device-manufacturer (IDM) workflows; they do not establish that every Tachyon 2.0 component or configuration was used at each customer.
Beyond 45 nm
In a 2012 roadmap description, ASML placed Tachyon in a broader computational-lithography portfolio and described Tachyon Flexible Mask Optimization for 2x-nm designs. The release also discussed localized OPC techniques and defect-free boundary healing between correction regions. This indicates that the Tachyon product family continued into later-node mask-optimization work; it is not evidence that the 2007 Tachyon 2.0 configuration itself remained unchanged or was the specific product used for those applications.
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Was Brion acquired by ASML?
Yes. Brion became part of ASML, which later described Tachyon products within its computational-lithography portfolio. ASML’s 2012 announcement attributed a statement about Tachyon FMO’s defect-free boundary healing to Jim Koonmen, then general manager of Brion Technologies. The later portfolio context helps explain the product lineage, but it does not by itself establish current product availability or support.
Can you buy or use Tachyon today?
The available contemporary reporting says Brion did not publicly release Tachyon pricing. The documented customers and uses are industrial—foundries, IDMs, and chip designers—not ordinary consumer users. The available information does not establish whether Tachyon is currently sold, supported, or obtainable through a particular purchase route. A reader evaluating it for production should confirm product status, licensing, supported process flows, and service arrangements directly with ASML.
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