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RISC-V’s momentum is built on more than an open, royalty-free instruction-set architecture. Its member-led standards work connects with regional alliances, multinational engineering projects and university programs that help turn shared specifications into research, designs and skills.
Why is RISC-V growing through collaboration?
RISC-V is an instruction-set architecture (ISA): a standard that defines how software communicates with a processor. Its open, royalty-free model gives organizations a shared foundation for developing compatible processor designs and related hardware and software. That makes collaboration central to the ecosystem: participants can work on specifications and extensions rather than relying on a single company to control the ISA.
RISC-V International describes itself as the nonprofit home of the open standard and its stakeholder community. Its 2024 review reported more than 4,120 members in 52 countries and more than 80 technical working groups. Those figures are a dated snapshot, not a current membership count, but they show the scale of participation the organization reported that year.
Who develops the RISC-V standard?
RISC-V International and its members
RISC-V International provides the global governance structure. Its members—including companies, universities and individuals—have a route to contribute to technical working groups and specification development. The work includes the ISA and its extensions, alongside related specifications and collaboration across hardware and software.
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- Flexible MCU Board: Incorporate the ESP32-C3 32-bit RISC-V chip, operating up to 160 MHz, mounted multiple development ports,
- Developer Friendly: Compatible with Arduino IDE, MicroPython, CircuitPython, PlatformIO, ESP IDF, Zephyr, Matter, ESPNow, Meshtastic, WLED, ESPHome, Home Assistant, Ubidots
- Outstanding RF performance: Complete Wi-Fi functions and Bluetooth Low Energy, while supporting communication over 100m with anFL antenna
- Elaborate Power Design: 4 working modes as low as 44 μA in deep sleep mode, while supporting lithium battery charge management
- Thumb-sized Design: 21 x 17.5mm, Seeed Studio XIAO series classic form factor
This is a standards-development process, not a claim that every RISC-V processor is designed collectively or that every implementation is interchangeable in every respect. The shared ISA provides a common base; particular projects still make their own design choices.
Regional and industry alliances
Alliances complement the global standards body by organizing communication, events and feedback around local or industry communities. They help participants build relationships and bring regional perspectives into a wider ecosystem. RISC-V International characterizes alliances as a way to foster local communication, events and feedback.
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- CH32V003 Development Minimum System Board for Nano RISC-V CH32V003F4U6 Chip TYPE-C USB 22Pin
- on-board 24MHz Crystal oscillator
- Power by TYPE-C USB
How international research projects use RISC-V
DARE: a multinational chiplet effort
The EuroHPC-supported DARE project, coordinated by Barcelona Supercomputing Center, brings together 38 partners to design and develop RISC-V-based chiplets. It illustrates collaboration at project scale: organizations coordinate engineering work around a shared architecture, while pursuing a concrete hardware-development goal.
RISC-V Brazil: connecting sectors and regions
At its event on 3–4 July 2025, RISC-V Brazil brought together participants from academia, research institutes, industry and government. International participants came from Europe, the United States and China, alongside Brazilian organizations. The example shows how a regional event can connect local ecosystem-building with overseas collaboration; it is a record of that event, not a recurring schedule.
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- The ESP32-C3 SUPERMINI is positioned as a high-performance, low-power, cost-effective IoT mini development board, suitable for low-power IoT applications and wireless wearable applications
- It is equipped with a rich set of interfaces, including 11 digital I/Os that can be used as PWM pins and 4 analog I/Os that can be used as ADC pins.
- It supports four serial interfaces, including UART, I2C, and SPI.
- The ESP32-C3 features a 32-bit RISC-V CPU, including an FPU (Floating Point Unit) capable of 32-bit single-precision
- Package: 2PCS ESP32-C3 MINI Development Board ESP32 SuperMini ESP32 C3 WiFi Module
How universities are building RISC-V talent
Shared curricula and applied training in China
SOPIC’s pilot-course work partnered with leading Chinese universities on a shared curriculum covering chip design through practical implementation. A related 2025 workshop involved 21 faculty members from 14 universities and described three collaboration channels:
- Co-developed RISC-V curricula.
- Joint research laboratories.
- Applied training centers.
These efforts address a practical need: a growing technical ecosystem requires people who can move from understanding the architecture to applying it in design and implementation.
Rank #4
- ESP32-C6 WiFi 6 microcontroller development board adopts ESP32-C6-WROOM-1-N8 module, which is equipped with RISC-V 32-bit single-core processor, up to 160MHz main frequency, built-in 8MB Flash
- Integrates WiFi 6, Bluetooth 5 and and IEEE 802.15.4 (Zigbee 3.0 and Thread) wireless communication, with superior RF performance
- Integrates rich peripherals including SPI, UART, I2C, I2S, LED PWM, SDIO and other interfaces, compatible with the pinout of ESP32-C6-DevKitC-1-N8 development board, more convenient to use and expand a variety of peripheral modules
- Onboard CH343 and CH334 USB HUB chips, supports USB and UART development at the same time via a USB-C port
- Comes with online examples and tutorials for ESP-IDF development environment
PolyU’s student initiative
PolyU’s first RISC-V Global Ecosystem Forum established an international platform spanning industry, academia and research. It also introduced a One Student One Chip Hong Kong base initiative, linking ecosystem collaboration with student participation in chip-related work.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.How to choose a way to participate
The best route depends on whether your goal is to influence standards, deliver engineering work, build regional connections, conduct research or develop skills. The options below serve different purposes and are not interchangeable.
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- Ample PSRAM Storage – The development board offers 8MB PSRAM, providing substantial extra memory for handling more complex tasks, large data buffers, and advanced processing.
- Enhanced Multi-Tasking Capability – With the additional 8MB PSRAM, the ESP32-C5-WIFI6-KIT can efficiently manage multiple protocol stacks simultaneously, ensuring smooth operation in multi-tasking IoT environments.
- Support for Medium-Load Applications – The 8MB PSRAM allows the ESP32-C5 to handle medium-load applications more effectively, making it ideal for scenarios requiring real-time data processing or continuous communication.
- Seamless Performance – The increased memory improves the overall performance and responsiveness of the device, particularly when running applications with larger memory footprints or more demanding computations.
- Future-Proof for Complex Projects – With 8MB of PSRAM, developers are better equipped to build scalable, high-performance solutions that support both current and future IoT use cases, offering flexibility for future-proofing designs.
| Route | What it offers | Best fit |
|---|---|---|
| RISC-V International membership | A route into member participation, technical working groups and specification work. | Organizations or individuals interested in standards and extensions. |
| Development Partner Program | Structured engineering engagement: align with technical working groups, define statements of work, deliver proof-of-concept projects and support ongoing projects. | Partners prepared to contribute engineering effort to defined work. |
| Regional or industry alliances and events | Local communication, events, relationships and feedback. | Participants seeking connections in a geography or industry community. |
| Research projects such as DARE | Collaborative work on substantial technical goals, such as RISC-V-based chiplets. | Research and engineering organizations able to contribute to a multi-partner project. |
| Education partnerships | Shared curricula, laboratories, applied training and student chip initiatives. | Universities, educators and organizations building skills and a talent pipeline. |
Program details, membership counts and event availability can change. Check RISC-V International and the relevant alliance, project or university for current participation terms before committing; no single route is required to take part in the broader ecosystem.
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