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Mentor Graphics announced Veloce2 on April 25, 2012, promising twice the performance and capacity of its predecessor and a fourfold productivity gain, with no increase in footprint or power consumption. Those figures were Mentor’s claims, reported by EE Times; the report did not provide independent benchmarks. Veloce2 was an enterprise hardware emulator for verifying complex electronics and system-on-chips (SoCs), not a consumer or gaming emulator.

What Mentor announced

Veloce2 was the next generation of Mentor Graphics’ hardware-emulation platform. Hardware emulation lets engineering teams run designs on specialized hardware to verify complex chips and systems, including software before physical silicon is available. Mentor positioned Veloce2 for designs whose scale and verification demands were challenging for simulation or FPGA prototyping.

In the announcement, Mentor compared Veloce2 with its predecessor on performance, capacity, productivity, physical footprint and power consumption. The promised gains were vendor statements carried by EE Times, not independently verified results; the report does not give benchmark conditions or measurements that would support a head-to-head ranking against other emulators.

How Veloce2 was designed to deliver the gains

Crystal2 emulation chip

The system was built around Mentor’s custom Crystal2 emulation IC, fabricated on a 65-nanometer process. Mentor linked the platform’s performance and capacity to fast compilation, full debug visibility and advanced memory modeling. The contemporary report describes these design aims but does not include a technical datasheet or independent evaluation of them. EE Times’ announcement report covers the launch; its related technical coverage discusses the platform further.

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Alchitry Br Prototype Element Board - prototyping Periphery for The Au or Cu FPGA Development Boards
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Software compatibility

The Veloce2 software suite was reported as backward compatible with first-generation Veloce emulators. That meant existing Veloce customers could adopt the software while continuing to use their earlier-generation hardware, preserving that investment according to the announcement coverage.

What VirtuaLAB changed

Alongside Veloce2, Mentor introduced Veloce VirtuaLAB, a software-based way to provide peripheral behavior for verification rather than relying on physical peripherals connected through hardware speed adaptors. The report names USB, Ethernet, PCI Express, SATA, SAS and multimedia video/audio among the interface areas covered or planned.

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RTL models of key peripherals could be used to create a virtual target environment for checking hardware and embedded software before silicon existed. Mentor and Jim Kenney, then director of marketing for Mentor’s emulation division, presented the software environment as easier to replicate for multiple developers, share across projects or locations, and reconfigure without physically accessing the emulator. The report does not quantify time or cost savings, nor does it compare model fidelity with a controlled physical-peripheral setup.

Why Mentor said demand for emulation was growing

Kenney attributed emulation’s adoption to three pressures: larger designs, existing emulation users needing more capacity, and customers wanting to execute and debug software earlier than they could with a simulator or FPGA prototype. This was Mentor’s explanation of the market, not an independent assessment of demand.

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Cmod S7: Breadboardable Spartan-7 FPGA Module
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The article also relayed historical estimates: Gary Smith EDA put the emulation market at about $118 million in 2008 and about $211 million in 2012. Kenney considered those estimates potentially conservative and cited a separate estimate of about $225 million for 2011, based on additional data from the EDA Consortium. These are period-specific estimates attributed to different sources, not current market measurements. EE Times’ market report provides that context.

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Availability at the time of launch

EE Times reported that Veloce2 and VirtuaLAB were available immediately in April 2012 and that Mentor said six Veloce2 systems had already been delivered, most in production use. That is the status reported at launch; it does not establish present-day availability, support, pricing or the current Veloce generation.

Quick Recap

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Digilent Basys 3 Artix-7 FPGA Trainer Board: Recommended for Introductory Users
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Cmod S7: Breadboardable Spartan-7 FPGA Module
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Xilinx Spartan-7 FPGA (XC7S25-1CSGA225C); Memory: 4 MB Quad-SPI Flash; USB-JTAG programming circuitry, USB-UART bridge
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Yaregelun FPGA Development Board ICESugar RISC-V Architecture ICE40UP5k Open Source USB-C Interface for IoT/AI Projects
Yaregelun FPGA Development Board ICESugar RISC-V Architecture ICE40UP5k Open Source USB-C Interface for IoT/AI Projects
Lead out all the IO with standard PMOD connector and can connect with other PMOD devices; Features
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Nandland Go Board - FPGA Development Board for Beginners with USB Cable, 4 LEDs, 4 Push-Buttons, 7-Segment Display, VGA, PMOD, Win/Mac/Linux Compatible
  • The best way to get started with FPGAs: Using a simple board with projects that build on eachother, now anyone can get started with FPGA development!
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