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Reliable mixed-signal measurements depend on more than adding capacitors or splitting a ground plane. Keep supply and return paths low impedance, make fast-current loops compact, and route sensitive analog nodes so their return currents are not forced onto a detour. Then verify the design against the target IC’s datasheet and reference layout: grounding and decoupling details are device- and board-specific.
How power and return paths create noise
Shared return impedance can shift a measurement
Ground is part of the circuit’s current path, not an ideal zero-volt sink. Any resistance or inductance shared by changing digital current and a sensitive analog return can develop a voltage that appears in the analog measurement. At an ADC, that shift can affect the input or reference and show up as code variation or an offset.
Texas Instruments describes the mechanism in its ADC12_A documentation, a chapter excerpt from SLAU208 revised in March 2018: “Ground loops are formed when return current from the ADC flows through paths that are common with other analog or digital circuitry.” The practical question is therefore not simply whether a board has one ground or two, but where the relevant currents flow and whether they share impedance with a sensitive signal.
Switching can couple through more than the supply rail
Fast clocks, switching power nodes, and high-current load transitions can disturb analog circuitry through shared power or return impedance, as well as through parasitic capacitive coupling. A long or spread-out switching loop also gives the disturbance more opportunity to couple into nearby inputs, references, or feedback nodes. These mechanisms can produce similar symptoms, so a noisy ADC reading alone does not identify the cause.
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Should you use one ground plane or split grounds?
There is no universally correct plane topology for every mixed-signal PCB. Vendor guidance reflects different devices and system conditions: some examples use separate analog and digital grounds joined at one point, while others use one continuous ground plane and manage noise through placement and routing. Those approaches are not automatically contradictory; the target device, current paths, board stack-up, and EMC environment matter.
| Approach | What it can support | What to verify |
|---|---|---|
| One continuous ground plane | Provides a continuous reference beneath signals so their return currents can follow nearby paths. Analog Devices’ multichannel ADC layout guidance describes a six-layer example with a single ground plane, separate power planes, and analog and digital signals routed from different directions. | Keep sensitive analog routing away from noisy digital activity and avoid routing digital signals under the ADC where the cited guidance advises against it. Confirm that the actual return paths remain low impedance. |
| Separate analog and digital grounds joined at a point | Can be appropriate where the target device’s documentation calls for it. TI’s ADC12_A guidance describes a single-point connection for its high-accuracy arrangement. | Check where currents cross the connection and whether a split forces signal returns to detour or creates voltage differences between plane regions. |
| Device-specific AGND, DGND, or PGND connections | Follows the connection scheme of an IC that defines multiple ground pins. Analog Devices’ ADP1046 layout note discusses AGND, DGND, and PGND for that controller. | Use the pin-by-pin instructions and reference layout for the exact part; do not assume the same named grounds should be connected the same way on another device. |
Analog Devices’ “Staying Well Grounded” discussion likewise emphasizes the converter’s pin connections and the actual system topology. Across these examples, the reliable design principle is to preserve low-impedance return paths and avoid placing a sensitive trace over a plane gap that forces its return current to take a long route. Consult the selected converter or microcontroller’s datasheet and evaluation-board layout before choosing or changing a topology.
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How to decouple supply pins
Make the bypass loop local
Place the specified high-frequency bypass capacitor close to the supply pin it serves, with a short, low-inductance connection to the appropriate return. The capacitor and its connections form a local path for fast current changes; a long route undermines that purpose. Follow the device documentation for which pins need capacitors and for capacitor value, package, voltage rating, dielectric, and placement.
Do not treat a value from another board as a universal rule. Analog Devices’ CN-0368 circuit note specifies 1 μF and 0.1 μF ceramic capacitors close to the ICs in that particular design. Its AD7606B EMC note gives different, pin-specific placement instructions and emphasizes short traces. Those are examples for their respective circuits, not generic prescriptions for every ADC or microcontroller.
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Understand the role of bulk capacitance
Local bypassing and bulk capacitance address different needs: bulk capacitance helps with lower-frequency supply variation and load transients, while a properly placed small bypass capacitor supports fast local current changes. The appropriate combination depends on the device and supply network. Use the manufacturer’s recommendations rather than adding capacitance blindly; a capacitor value alone cannot compensate for poor placement or a high-inductance connection.
How placement and routing limit coupling
- Separate noisy and sensitive nodes where practical. Keep switching nodes, fast clocks, and high-current loops away from low-level analog inputs, references, and amplifier feedback nodes.
- Minimize fast-current loop area. Keep the return path close to the outgoing path so the loop is compact. Analog Devices’ AN-1103 layout note for the ADP1046 stresses understanding how a signal returns to its source and then keeping that loop area small, rather than applying a rule without regard to the circuit.
- Preserve a useful reference beneath signals. A continuous plane can help a signal’s return stay near its route. Avoid routing a sensitive signal across a gap that makes its return detour; assess the actual plane and current paths for the chosen stack-up.
- Use directional separation thoughtfully. For the multichannel ADC layout it describes, Analog Devices recommends routing digital signals from one direction and analog signals from another, avoiding digital routing under the ADC, and placing supply bypass capacitors close to the device. Treat these as layout guidance for that context, not a guarantee of performance in every board.
A practical sequence for troubleshooting noise
- Define the symptom. Record whether the problem is ADC code variation, analog output noise, supply or reference ripple, clock ringing, or resets. These observations point to different parts of the system and should not be collapsed into a single diagnosis called “ground noise.”
- Check the implementation against the part’s documentation. Compare supply, reference, and ground connections with the datasheet and reference layout. Inspect the affected signal’s return route and the decoupling loop. Relevant vendor examples include Analog Devices’ AD7606B EMC note and Texas Instruments’ ADC12_A grounding guidance.
- Vary digital activity as a diagnostic. Temporarily reduce digital activity or change switching conditions, then observe whether the symptom changes. A correlation is useful evidence, but it does not by itself prove whether the coupling is through a shared return, supply impedance, or another path.
- Check whether the probe is creating the apparent problem. Re-measure with a short ground spring or another low-inductance ground connection compatible with the probe and measurement. Tektronix’s “ABCs of Probes Primer” discusses probe-ground technique; Analog Devices’ Guy Hoover showed in “Short Ground Leads Make Better Scope Photos” (November 6, 2013) how a long ground lead can add inductance and make ringing or overshoot appear on a trace. Keep the probe ground loop away from clocks and switching nodes, and observe the probe’s electrical ratings.
- Change one variable at a time. Compare the same electrical point, measurement bandwidth, and operating conditions before and after a layout, filtering, or supply change. Otherwise, a changed result may be difficult to interpret.
How to choose a corrective change
Before splitting a plane, adding filters, or changing the supply arrangement, compare the likely change with the observed current paths and operating environment. Check return-path continuity and impedance beneath sensitive traces; the size of high-di/dt loops and their proximity to analog nodes; capacitor location and connection inductance; and whether analog and digital currents share impedance that can shift an input or reference. Also account for EMC and current injection in the actual enclosure and cable arrangement, and ensure measurement conditions are repeatable.
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No single corrective option can be selected confidently without knowing the converter or microcontroller, board stack-up, switching supply, signal bandwidth, and EMC environment. A device-specific reference implementation can help make the comparison concrete: Microchip’s AN1300, “Designing with the MCP3901 Dual Channel Analog-to-Digital Converters,” dated June 24, 2015, covers grounding and layout and identifies the MCP3901EV-MCU16 evaluation board as a related example. Use it as an example for the MCP3901, not as a universal mixed-signal layout.
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