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One free scan finds every outdated or missing driver and matches the right update for your exact hardware.Free scan · exact hardware matchMatrix multiplication is the main way neural networks combine inputs with learned weights. It powers dense-layer outputs, appears in the gradients used to train those layers, and underlies many convolution, recurrent, and Transformer computations. The sizes of the matrices determine the work; their shapes, data movement, precision, and the GPU’s hardware determine how quickly that work runs.
What matrix multiplication does
For a matrix A with shape M×K and a matrix B with shape K×N, the product AB has shape M×N. The inner dimensions, K and K, must match. Each output element is the dot product of one row of A and one column of B:
Cij = ∑k=1K AikBkj
A general matrix-multiply operation, often called GEMM, can be written C = αAB + βC. A plain product uses α = 1 and β = 0. NVIDIA’s documented operation count for an M×K by K×N product is M·N·K fused multiply-adds, or 2·M·N·K FLOPS when each multiply and each add is counted separately. This is an arithmetic count, not a promise of how long the calculation will take.
How a matrix multiply appears in a neural network
Forward pass in a dense layer
Suppose a batch contains B examples, each represented by D input features. Put those examples into a B×D activation matrix X. A dense layer with H outputs has a D×H weight matrix W. Its main calculation is:
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Y = XW
The result has shape B×H: one H-feature output for each example. A bias vector can then be added to every row. Some software stores weights with the opposite orientation and writes the equivalent operation as WX; the convention changes the written shapes, not the underlying calculation.
For this layer, the product entails B·D·H multiply-adds, or 2·B·D·H FLOPS under the two-operations-per-multiply-add convention. Increasing the batch size or either feature dimension increases the work, but it can also create larger, more efficient GPU workloads.
Backward pass during training
Training uses more matrix multiplications to propagate the loss gradient. If G is the gradient with respect to the layer output and has shape B×H, then, using the convention above, the input gradient and weight gradient are:
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- dX = GWT, with shape B×D.
- dW = XTG, with shape D×H.
The bias gradient is obtained by summing G across the batch. These operations explain why training a dense network involves matrix multiplication in both the forward and backward passes, while ordinary inference mainly needs the forward calculation.
Convolutions, recurrent layers, and attention
Convolution and recurrent computations can also be expressed as collections of dot products or matrix multiplications. Implementations may rearrange or transform data to expose those operations, so the exact tensors and memory layouts differ. The performance questions remain similar: what are the effective matrix dimensions, how much data must move, and is there enough parallel work?
Transformers process many tokens in parallel, producing large matrix multiplications in attention and feed-forward blocks. In standard self-attention, the formulation discussed by Katharopoulos and colleagues has quadratic complexity in sequence length. Their linear-attention method reorders products using associativity to obtain linear dependence on sequence length under the method’s assumptions; it is a different formulation, not a universal replacement with identical behavior.
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Why matrix shape affects GPU speed
Tiles, parallel work, and reuse
GPUs divide matrix multiplication into tiles of the output and assign tile work to thread blocks. Each tile computes a region of the M×N result while reusing portions of the input matrices. Large matrices with dimensions that expose many tiles can provide abundant parallel work and reuse. Very small matrices may not provide enough work to keep the GPU busy, while awkward dimensions can leave hardware resources underused.
Batching independent examples often turns a series of small matrix-vector operations into a larger matrix-matrix operation. That can improve utilization, though it does not change the mathematical result. Batching is less helpful when latency requirements prevent waiting for more examples or when the workload is already large enough.
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Arithmetic intensity and memory traffic
Arithmetic intensity is the amount of computation performed per byte moved. A large, well-shaped matrix multiplication can reuse loaded values many times and become limited mainly by compute capacity. A matrix-vector product or a small-batch workload often has less reuse and can be limited by memory bandwidth instead. In that case, a GPU’s peak arithmetic rate says little about the achieved speed: moving data, rather than performing arithmetic, is the bottleneck.
Kernel design therefore considers more than operation count. Tiling, memory hierarchy, data layout, dimension alignment, batching, and fusion with adjacent operations all affect bytes moved and time spent launching or coordinating work.
Precision and specialized GPU hardware
GPUs may offer specialized matrix-multiply hardware such as NVIDIA Tensor Cores, which accelerate matrix multiply-accumulate operations on small blocks. Using them effectively depends on the GPU, software path, data type, dimensions, and alignment. NVIDIA describes FP16 inputs with FP32 accumulation and provides alignment guidance for efficient Tensor Core use.
Precision choices trade numerical range and accuracy against storage requirements and potential throughput. FP32, TF32, FP16, BF16, and INT8 are not interchangeable settings: models and software must support the chosen format, and the effect on output quality depends on the workload. Lower-precision inputs can reduce memory traffic, while accumulation at a wider precision can help preserve the result of summing many products.
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NVIDIA documentation accessed in 2026 gives 138.9 FLOPS per byte as a V100 FP16 Tensor Core example ratio. For a cited A100 example, it lists peak dense throughput of 156 TF32 TFLOPS and 312 FP16 TFLOPS. These are hardware examples and peak specifications, not expected application speeds or guarantees for every matrix shape. Actual throughput depends on workload dimensions, precision, memory behavior, software, and the GPU in use.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.How to compare matrix-multiplication performance
A meaningful comparison needs enough detail to explain what work was performed and on what system. When evaluating a benchmark, check:
- Dimensions and batch size: include M, N, K, or the layer dimensions and batch size; shape can change utilization substantially.
- Workload phase: distinguish inference’s forward products from training’s forward and gradient products.
- Precision: report the input and accumulation data types, not simply that mixed precision was used.
- Hardware and software: identify the GPU and the relevant library or kernel version.
- Measured versus peak performance: a peak specification describes a hardware ceiling under suitable conditions; achieved throughput is the measured result for the stated workload.
- Memory behavior: note whether the calculation is compute-bound or limited by data movement, and whether batching or fusion changes that balance.
Triton’s authors identify matrix multiplication as important enough in neural networks to motivate a dedicated GPU-kernel programming approach. In practice, a highly tuned kernel depends on matching the workload’s dimensions and data movement to the GPU’s memory hierarchy and specialized units; a single throughput number cannot rank implementations for every neural network.
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