An LDO’s output quality depends on two separate properties: the noise it generates internally and its ability to reject disturbances already present on its input. A regulator can have excellent intrinsic noise but weak rejection at a switching converter’s frequency, or strong PSRR while adding too much noise for a precision reference. Evaluate both against your circuit’s actual frequency spectrum, load, headroom, capacitor network, thermal limits, and measurement bandwidth.
Intrinsic noise and PSRR answer different questions
Intrinsic output noise is generated inside the regulator by its reference, error amplifier, pass transistor, bias circuits, resistors, and protection or digital circuitry. Power-supply rejection ratio (PSRR) describes how much an input-voltage disturbance is attenuated before it appears at the output. These mechanisms are separate and must be budgeted separately. Analog Devices discusses the distinction and the relevant noise sources in AN-1120.
A useful model is:
vout(f) = Hintrinsic(f)vinternal-noise + Hfeedthrough(f)vin(f)
The first term is noise created by the LDO; the second is input noise transferred through it. Noise entering after the regulator, through ground impedance, a reference pin, electromagnetic coupling, or the load itself, is not removed by the LDO.
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- Built-in protection against overcurrent, overtemperature, and short-circuit conditions ensures long-term reliable operation in applications such as smart homes and industrial gateways.
- Each package contains 50 chips, sufficient quantity and easy replacement
What noise does an LDO generate?
Internal noise commonly comes from:
- Bandgap or other voltage-reference noise.
- Error-amplifier voltage and current noise.
- Pass-transistor noise.
- Bias-current and current-source noise.
- Thermal noise in feedback resistors and other resistive elements.
- Low-frequency 1/f noise.
- Broadband thermal and shot-noise contributions.
- Coupling from enable, power-good, charge-pump, protection, soft-start, or noise-reduction circuits, where present.
Noise is specified in different forms. Spot-noise density is measured at a particular frequency, normally in nV/√Hz or µV/√Hz. Integrated RMS noise is the total over a stated frequency range, in µV RMS. Peak-to-peak noise depends strongly on bandwidth, observation time, instrument filtering, and statistical assumptions. These values are not interchangeable.
For example, “7 µV RMS from 10 Hz to 100 kHz” cannot be compared directly with “2 nV/√Hz at 10 kHz” without integrating or otherwise normalizing the measurements. Noise is often concentrated toward low frequencies; TI explains the units and bandwidth issue in its LDO noise article.
What PSRR means
For a sinusoidal input disturbance, the voltage definition is:
PSRR(dB) = 20 log10(VIN,noise / VOUT,noise)
Therefore:
VOUT,noise = VIN,noise × 10−PSRR/20
| PSRR | Output fraction of input ripple | 100 mV input ripple becomes |
|---|---|---|
| 20 dB | 10% | 10 mV |
| 40 dB | 1% | 1 mV |
| 60 dB | 0.1% | 100 µV |
| 80 dB | 0.01% | 10 µV |
| 100 dB | 0.001% | 1 µV |
PSRR is a frequency-dependent curve, not a universal rating. Its value depends on input and output voltage, headroom, load current, output capacitor and ESR, temperature, frequency, layout, and the exact device variant. A table value at one frequency does not describe performance at every switching harmonic. Analog Devices describes the operating regions and limitations in AN-1120 and Understand Low-Dropout Regulator Concepts.
Why PSRR falls as frequency rises
At low frequency, the error amplifier senses an output disturbance and adjusts the pass device, using feedback-loop gain to reject it. As frequency approaches and exceeds loop crossover, loop gain falls and the regulator has less time and authority to correct the disturbance.
At higher frequencies, output-capacitor impedance, capacitor ESL, package inductance, PCB trace inductance, pass-device parasitic capacitance, and direct input-to-output capacitive coupling increasingly determine the result. The exact curve depends on the LDO architecture; not every part has identical regions or benefits from more capacitance.
Operating conditions that change the result
Headroom and dropout
Dropout voltage is the minimum input-to-output differential needed to maintain regulation under stated conditions. Headroom is the differential actually available in your circuit. Near dropout, the pass device has less control authority, loop gain and PSRR can degrade, load-transient performance can worsen, and thermal conditions may change. A curve measured with several hundred millivolts of headroom may not apply when the input rail approaches the dropout limit during a load event.
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Load current
Load current changes the pass-device operating point, output-stage gain, output impedance, and sometimes compensation. PSRR at light load can differ substantially from PSRR at the rated current; check the curve at the current your circuit actually draws.
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Voltage, temperature, and tolerances
Check minimum and maximum input voltage, programmed output voltage, temperature range, capacitor tolerance and DC-bias derating, package variant, and whether each number is guaranteed or merely typical. Some architectures keep noise nearly constant across output settings; others do not.
Output capacitors are part of the regulator
The output capacitor affects loop stability, PSRR, load-transient droop and recovery, high-frequency impedance, startup, and noise filtering. A ceramic capacitor’s effective capacitance can fall substantially under DC bias. ESR may be required for compensation, while a very low-ESR part can destabilize an LDO designed for a resistance range. A capacitor placed far from the LDO or load is less effective because of trace inductance. Follow the exact datasheet requirements for value, type, voltage rating, ESR, and placement. TI’s high-accuracy PSRR measurement report shows why capacitor characteristics materially affect measurements.
| Design choice | Potential benefit | Potential risk |
|---|---|---|
| Increase output capacitance | Lower impedance and improved transient response; possible high-frequency improvement | Inrush, startup delay, instability, or reduced effective capacitance under bias |
| Use a ceramic capacitor | Compact, low ESR, good high-frequency behavior | May violate an ESR requirement; capacitance derates with DC bias |
| Add ESR | Can stabilize some loop architectures | Worsens high-frequency filtering and ripple performance |
| Add a noise-reduction or bypass capacitor | Can reduce reference noise | May slow startup and alter loop or transient behavior |
| Add a feed-forward capacitor | May improve bandwidth, transient response, or PSRR | Can reduce phase margin or cause peaking if not specified |
Feed-forward and noise-reduction capacitors are device-specific techniques, not universal fixes; TI discusses their trade-offs in this technical article.
Combining LDO noise with upstream ripple
For approximately uncorrelated random contributions, use root-sum-square:
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This approximation does not describe correlated sources, deterministic switching spurs, ground bounce, or nonlinear modulation. A narrowband spur can be more damaging to a PLL or clock than a larger amount of broadband noise. Supply variation can modulate an oscillator and create phase-noise or spur problems, as described in AN-1120.
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- Low dropout voltage enables efficient operation even with small input-output differential
- Battery-powered devices 3.3V systems and low dropout applications
Worked example
Suppose a switching converter produces 100 mV of ripple at 500 kHz and the LDO’s PSRR at that frequency is 50 dB:
100 mV × 10−50/20 ≈ 316 µV
That 316 µV is feedthrough at 500 kHz. Add the LDO’s integrated noise separately; do not treat the periodic ripple as if it were random RMS noise.
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Reading an LDO datasheet correctly
Noise checklist
- Is the value spot density or integrated RMS noise?
- What frequency range and measurement bandwidth are used?
- What input and output voltages, load current, temperature, and capacitor network apply?
- Is a noise-bypass capacitor fitted?
- Is the result typical or guaranteed?
- Is it measured at the LDO pin or after a specified PCB or filter?
PSRR checklist
- What is the actual disturbance frequency, including switching harmonics?
- Do the input voltage, output voltage, headroom, and load match your design?
- Are output capacitance, ESR, input capacitance, and placement identical?
- Is the curve typical or guaranteed, and does it apply to the exact package and variant?
- Was an injection network used, and does it alter the DC bias or AC impedance?
Published examples
The Analog Devices LT3045 page lists 500 mA output current, 0.8 µV RMS noise from 10 Hz to 100 kHz, 2 nV/√Hz spot noise at 10 kHz, 76 dB PSRR at 1 MHz, a 1.8–20 V input range, and a 10 µF minimum ceramic output capacitor. These are manufacturer-published specifications, not an independent comparison.
TI’s TPS7A20 page lists 300 mA output, 1.6–6.0 V input, 0.8–5.5 V output, 7 µV RMS noise, 60 dB PSRR at 100 kHz, approximately 6.5 µA typical quiescent current, a 1 µF minimum load capacitor, and approximately 110 mV typical dropout. The two parts are not direct substitutes: LT3045 targets very low noise, higher voltage and current, while TPS7A20 emphasizes low quiescent current and compact low-voltage designs.
Selecting an LDO for the load
ADC or DAC
Prioritize integrated noise over the converter’s relevant bandwidth, PSRR at clock and data-rate-related frequencies and at the upstream converter frequency, reference and ground architecture, burst-load transients, and output impedance across the converter’s current spectrum.
PLL, VCO, clock, or RF synthesizer
Prioritize narrowband spurs, PSRR at the switching fundamental and harmonics, supply-to-phase-noise sensitivity, high-frequency layout and shielding, and the behavior of any noise-reduction pin.
Audio
Evaluate integrated noise across approximately 20 Hz–20 kHz and beyond, 1/f noise, switching spurs, ground-loop coupling, electromagnetic pickup, and activity-related load transients. TI notes the audio-band emphasis in its noise guidance.
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Battery-powered sensors
Quiescent and shutdown current, minimum operating voltage, load range, noise over the sensor bandwidth, startup and enable behavior, and capacitor size may matter more than headline PSRR.
Post-regulation after a switcher
Verify headroom over the full load range and calculate heat:
PD ≈ (VIN − VOUT)IOUT
Check PSRR at the converter’s fundamental and harmonics, thermal resistance, and whether an LC filter could remove ripple more efficiently.
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- Use a clean, low-noise DC input source.
- Install the exact input and output capacitors specified by the manufacturer.
- Use short, low-impedance wiring and a realistic load.
- Connect through shielded coax; where practical, place an SMA connection directly across the output capacitor rather than using a long oscilloscope ground lead.
- Use an instrument whose input noise is below the expected LDO noise.
- Define bandwidth, resolution bandwidth, detector, and averaging before measuring.
- Separate power and measurement grounds and record input voltage, load, temperature, capacitor details, and instrument connection.
- Measure the instrument floor with its input shorted, and compare with the LDO disabled, bypassed, or replaced by a known low-noise source where practical.
TI demonstrates coaxial probing and practical noise measurement in Engineer It: How to Measure LDO Noise and PSRR. An oscilloscope’s own noise, a long probe ground, a noisy source, ground loops, or a switching spur can otherwise dominate the result.
Measuring PSRR
PSRR testing injects a controlled AC disturbance onto the LDO’s DC input and measures the resulting AC output. A DC-plus-AC summing or injection network is normally required, as shown in the Keysight measurement note.
- Assemble the LDO with the recommended capacitors and load.
- Set the input DC voltage and output load.
- Inject a small AC signal over the required frequency range.
- Measure the actual AC voltage at the LDO input pins, not merely at the source or injection generator.
- Measure AC voltage at the output pins with a short, shielded connection.
- Calculate PSRR = 20 log10(VIN,AC/VOUT,AC) at each frequency.
- Repeat at relevant headroom, load-current, temperature, and capacitor conditions.
- Check for overload, clipping, excessive ripple, thermal drift, and injection-network response.
- Compare with the datasheet only when test conditions match.
Common errors include shunting the injected AC with an input capacitor, allowing the network to change DC bias, measuring with a long ground lead, ignoring transformer or network response, exceeding permitted input ripple, and confusing a load-step or line-transient test with small-signal PSRR. TI presents alternative methods in LDO PSRR Measurement Simplified.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.Do not confuse noise, ripple, and transients
- Noise: generally random or broadband, although systems can contain deterministic spurs too.
- Ripple: periodic or quasi-periodic disturbance, usually evaluated at a switching fundamental and harmonics.
- Line transient: a relatively large time-domain change at the input.
- Load transient: a sudden output-current change. The output capacitor responds first; the control loop then restores the voltage.
TI describes this load-transient sequence in the TPS7A4701-EP documentation. A regulator can therefore have low intrinsic noise but poor transient response, strong PSRR at 1 kHz but weak rejection at 1 MHz, or low integrated RMS noise with a troublesome discrete spur.
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- Output is set by the part number; the ADJ version sets it with two external resistors
Troubleshooting common failures
Output noise is much higher than the datasheet value
- Verify the instrument noise floor and measurement bandwidth.
- Use coaxial pickup directly at the output capacitor.
- Replace the input source with a verified low-noise supply.
- Reproduce the specified capacitor, load, bypass capacitor, and input conditions.
- Use FFT or a spectrum analyzer to separate broadband noise from discrete spurs.
- Repeat at multiple bandwidths and compare with a bypassed or known low-noise source.
PSRR is excellent at 1 kHz but poor at 500 kHz
The loop bandwidth may be below 500 kHz; capacitor ESL, parasitic feedthrough, switching harmonics, or PCB coupling may dominate. Read the complete curve, measure at the actual switching frequency, improve capacitor placement, reduce upstream ripple, add an appropriate filter, or choose an LDO rated for high PSRR in that band.
The LDO oscillates after a capacitor change
Restore the specified capacitor, check effective capacitance under bias and the allowed ESR range, inspect cable and via inductance, verify placement, and test across minimum and maximum load. Excessive capacitance or a different package variant can also change phase margin.
Output droops during a load step
Check capacitance, ESR and ESL, trace length, input headroom, current limit, control-loop speed, and input bypassing. This is a transient-response problem, not a PSRR measurement.
A quiet LDO does not fix system noise
Look for injection after the regulator, shared ground impedance, reference or clock interfaces, electromagnetic coupling, internal load conversion, or upstream energy at frequencies where PSRR is weak.
When an LDO is not the best answer
LC or π filter
Useful for known switching ripple without dissipating the voltage difference, but resonance, damping, DC resistance, and load dependence must be designed.
Ferrite-bead filter
Useful for localized high-frequency isolation; performance is less predictable at low frequency and can resonate with ceramic capacitors.
Switching regulator followed by an LDO
The switcher handles efficient voltage conversion and the LDO removes residual ripple. The LDO still needs adequate headroom, acceptable dissipation, and PSRR at the switcher’s operating frequencies.
Two-stage filtering or active cancellation
These can improve attenuation but add dropout, loss, startup and stability interactions, or application-specific complexity.
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PCB architecture
Moving the switch node away, shrinking its copper area, separating returns, adding shielding and local decoupling, changing converter frequency, or eliminating shared impedance may solve the problem without changing the regulator.
Quick Recap
Final selection checklist
- List the upstream ripple spectrum, including harmonics and narrowband spurs.
- Specify allowable output noise with its frequency bandwidth and detector.
- Check PSRR at every important disturbance frequency, not just a headline value.
- Verify headroom, dropout over load and temperature, and thermal dissipation.
- Match the datasheet’s capacitor value, effective capacitance, ESR, ESL, voltage rating, and placement.
- Confirm load-current range, quiescent current, startup behavior, and package variant.
- Distinguish guaranteed limits from typical curves and manufacturer specifications from independent measurements.
- Validate with a shielded, bandwidth-defined noise test and a calibrated AC-injection PSRR test.
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