The right circuit depends on what “binary” means. To output HIGH above a chosen duty cycle and LOW below it, use PWM → RC low-pass filter → comparator (or Schmitt trigger). The filter creates an analog average; the threshold device turns that voltage into a defined logic state. If you only need to know whether pulses are present, use a pulse detector or firmware timeout instead.
Choose the behavior before choosing the circuit
| Required behavior | Suitable method |
|---|---|
| HIGH above a duty-cycle threshold | RC low-pass filter plus comparator or Schmitt trigger |
| HIGH whenever pulses are present | Retriggerable monostable, envelope detector, or firmware timeout |
| Preserve every PWM edge while changing voltage levels | Logic-level translator, buffer, or comparator without filtering |
| Recover an analog representation first | Low-pass filter, preferably buffered |
| Measure duty cycle accurately | Timer input capture or a dedicated PWM decoder |
| Switch a power load according to duty cycle | Comparator output followed by a MOSFET, load switch, relay driver, or other suitable driver |
PWM is electrically a digital waveform, but its information is in the duration of the HIGH interval. Microchip describes duty cycle as the ratio of high time to total period (Microchip PWM documentation). A digital input connected directly to PWM will see individual pulses, not one stable state representing their average duty cycle.
The standard hardware solution
Filter, then threshold
PWM ── R ──┬──── comparator input
│
C
│
GND
Reference voltage ─── comparator other input
Comparator output ─── binary output
For a stable, active-high PWM waveform, the filtered voltage is approximately:
VAVG ≈ D × VHIGH
Here, D is duty cycle from 0 to 1. A 5 V waveform at 60% duty cycle therefore averages about 3 V, subject to ripple, loading, tolerances, and settling time (Microchip filtered-PWM guidance).
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Set the duty-cycle threshold
Choose a reference voltage using:
DTH = VREF / VHIGH
For a 0–5 V input and a 40% turn-on point, set VREF to about 2.0 V. Connect the filtered signal to the comparator’s non-inverting input for HIGH when VAVG exceeds VREF. Reversing the inputs reverses output polarity.
Account for active-low PWM
If the waveform is inverted, its average is approximately VAVG ≈ (1 − D) × VHIGH. You can either use that equation or invert the signal before filtering.
Selecting the RC filter
The first-order cutoff frequency is:
fC = 1 / (2πRC)
Choose the cutoff well below the PWM frequency. A starting point near fPWM/10 is responsive but leaves visible ripple; a much lower cutoff reduces ripple at the cost of slower changes. Microchip identifies this as a trade-off between carrier attenuation, desired signal bandwidth, and response time. Analog Devices shows a 10 Hz cutoff used with a 5.5 kHz PWM signal when a smooth DC level is required (Analog Devices AN-798).
Worked example
For 10 kHz, 0–5 V PWM and a 40% threshold, use 10 kΩ and 100 nF as an initial filter:
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- Time constant: τ = RC = 1 ms.
- Cutoff: fC ≈ 159 Hz, about 1/63 of the PWM frequency.
- Reference: VREF ≈ 2.0 V.
The capacitor reaches about 63% of a step toward its final value after one time constant and needs several time constants to settle closely. A lower cutoff gives less carrier ripple but increases decision delay. Verify the actual ripple and transition time with an oscilloscope rather than treating any RC ratio as universal.
Buffer loaded filters
A low-impedance load can discharge the capacitor and change the average. Add a voltage follower or use a high-impedance comparator input when the next stage loads the RC node (Microchip filtered-PWM guidance).
Add hysteresis for a stable decision
Ripple, noise, reference movement, comparator offset, and duty-cycle jitter can make a single-threshold comparator switch repeatedly near the boundary. Hysteresis creates separate rising and falling thresholds. For example, specify HIGH at 40% or more and LOW below 35%; the gap prevents chatter.
TI documents external resistor feedback for setting upper and lower trip points and defines hysteresis as their difference (TLV3201/TLV3202 datasheet). Make the hysteresis window larger than expected ripple and noise, but not so wide that it violates the required duty-cycle limits. A 100 mV window can be a reasonable starting heuristic when ripple is about 50 mV, not a universal value.
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Choose the comparator or Schmitt trigger
Comparator checklist
- Supply-voltage range and input common-mode range.
- Input offset voltage and any built-in hysteresis.
- Output type: push-pull versus open-collector/open-drain.
- Output swing and current capability.
- Propagation delay, temperature range, input protection, and power consumption.
A slow duty-cycle decision rarely needs an extremely fast comparator because the RC filter usually dominates response time. TI’s TLV3201/TLV3202 family is one example of a rail-to-rail-input, push-pull comparator family specified for 2.7–5.5 V operation, with a typical 40 ns propagation delay on the referenced device (TLV3201 product information). The LM393 family is a lower-cost alternative, but its open-collector output requires a pull-up and each variant’s input and supply limits must be checked (TI LM393 product page).
Open-collector outputs need a pull-up
VCC ── pull-up resistor ── output
│
comparator output
An open-collector comparator actively pulls LOW but does not drive HIGH. The pull-up voltage sets the HIGH level and must be safe for both the comparator and receiving logic. Without that resistor, the output is not a complete logic signal.
When a Schmitt-trigger gate is enough
A Schmitt-trigger input can provide thresholding and hysteresis with fewer parts when its guaranteed input thresholds, voltage limits, output levels, and transition timing suit the application. Use a comparator when the threshold must be set accurately with an external reference or the filtered voltage does not align with ordinary logic thresholds.
Firmware is often the cleanest solution
When a microcontroller is already available, measure the PWM rather than approximating it with an analog average:
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- Capture rising and falling edges with a timer input-capture peripheral.
- Calculate period T and HIGH time tHIGH.
- Compute duty cycle: D = tHIGH / T.
- Compare it with programmable thresholds and set a GPIO.
- Apply software hysteresis, consecutive-sample filtering, and a missing-signal timeout.
Microchip’s timer-capture application note describes calculating pulse width and period from captured edges (Microchip AN8014).
const float on_threshold = 0.55f;
const float off_threshold = 0.45f;
if (period_ticks == 0 || signal_timeout) {
output = FAILSAFE_STATE;
} else {
float duty = (float)high_ticks / period_ticks;
if (!output && duty >= on_threshold) output = 1;
else if (output && duty <= off_threshold) output = 0;
}
Firmware offers inversion, diagnostics, frequency-range checks, and distinction between a valid 100% signal and a missing signal. Its costs are MCU power, timer resources, implementation latency, and dependence on running firmware.
Pulse presence is a different problem
An average filter intentionally responds to duty cycle. At a very small duty cycle, the average may never reach the comparator reference even though pulses are present. For “HIGH while any pulses continue,” consider:
Retriggerable monostable
Each pulse retriggers a timer; the output stays HIGH and falls LOW after a timeout. This suits fan-running indicators, watchdogs, and missing-signal detection.
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Peak or envelope detector
A diode-capacitor network captures pulse peaks while a resistor controls decay. Diode drop, leakage, temperature, pulse width, and decay tolerance limit threshold accuracy.
Firmware timeout
Assert the output while the time since the last valid edge remains below a specified limit. This is usually the most diagnosable option when an MCU is present.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.Voltage, grounding, and load safety
- Confirm whether the source is 3.3 V, 5 V, 12 V, open-drain, open-collector, push-pull, active-high, or active-low.
- Never exceed comparator or MCU input ratings. A 12 V PWM signal generally needs a divider, protected input, suitable supply, level translator, or isolation.
- Connect grounds only when the systems share a safe reference. Use galvanic isolation when they do not.
- An open-drain source may require a receiver-side pull-up compatible with both devices.
- A logic output is not a power output. Drive relays, motors, solenoids, lamps, or other inductive/high-current loads through a rated MOSFET, transistor, load switch, relay driver, or isolated driver, with flyback protection where required.
Design and validation procedure
- Write the rule, such as “HIGH at 40% and remain HIGH until below 35%.”
- Measure PWM HIGH and LOW voltages, frequency, polarity, duty-cycle range, minimum pulse width, and source type.
- Choose RC-plus-comparator for duty thresholding, pulse detection for activity, or timer capture for programmable measurement.
- Calculate VREF = DTH × VHIGH and select R and C from the required cutoff and response time.
- Estimate ripple, add hysteresis, and check loading and comparator input limits.
- Fit the output pull-up or power driver as required.
- Define behavior for disconnected, stuck-HIGH, stuck-LOW, out-of-range-frequency, startup, and shutdown conditions.
- Probe the PWM, RC node, comparator thresholds, and final output at 0%, 1%, threshold-minus-hysteresis, threshold, threshold-plus-hysteresis, 99%, and 100% duty cycle.
Do not assume mathematically perfect 0% or 100% duty cycle. PWM peripherals can impose minimum or maximum duty limitations (Microchip PWM implementation notes). A filter-plus-comparator may also treat a stuck-HIGH signal exactly like valid 100% duty; separate frequency or timeout monitoring is needed when that distinction matters.
Common mistakes and fixes
| Symptom | Likely cause | Fix |
|---|---|---|
| Output chatters | No hysteresis, excessive ripple, or noisy reference | Add hysteresis, improve filtering and reference decoupling |
| Low-duty pulses never register | Average voltage is below threshold | Lower threshold or use activity detection |
| Response is too slow | Cutoff frequency is too low | Reduce R or C, or use timer capture |
| Ripple is excessive | Cutoff too close to PWM frequency or filter is loaded | Lower fC, use a higher-order filter, or buffer it |
| Comparator output floats HIGH | Open-collector output lacks a pull-up | Install a correctly rated pull-up |
| Polarity is reversed | Comparator inputs or PWM polarity are inverted | Swap inputs or invert in hardware/software |
| Input or MCU is damaged | Overvoltage or transients | Use divider, clamps, series resistance, level shifting, or isolation |
| ADC readings vary | Unsynchronized samples observe different pulse phases | Average complete periods, synchronize sampling, or use capture |
Bottom line
For a stable binary result based on duty cycle, use an RC low-pass filter followed by a comparator or Schmitt trigger, set the reference from the desired duty threshold, and add hysteresis. For “signal present” detection, use a retriggerable pulse detector or firmware timeout. For precise, configurable thresholds and fault diagnostics, timer capture in firmware is usually the strongest choice.
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