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Use a buck converter followed by an LDO when you need efficient voltage reduction and a quieter rail for a sensitive load. Use a buck alone when efficiency, heat, cost, or current capacity matters more than minimum noise. Use only an LDO when the input-to-output drop and load current make its heat loss acceptable.

The second stage is a compromise, not a magic noise eraser: it adds power dissipation, components, layout area, startup considerations, and another possible failure point. Its value depends on the buck’s noise spectrum, the LDO’s frequency-dependent PSRR at the real operating point, guaranteed headroom, and the sensitivity of the load.

The three practical choices

A typical cascade is:

Higher-voltage input → buck converter → intermediate rail → LDO → quiet final rail

Architecture Efficiency Noise behavior Thermal and layout implications Typical fit
Buck only Usually highest for a step-down rail Switching ripple and EMI remain; may be adequate for tolerant loads Switching hot-loop layout is demanding, but little linear heat Digital, high-current, and battery-powered rails
LDO only Approximately VOUT/VIN Quiet when the source is quiet; the LDO itself still has reference and amplifier noise Simple electrically, but heat rises with voltage drop and current Small voltage drop and low-current rails
Buck plus LDO Between the other two Can attenuate conducted ripple and spurs over the LDO’s effective PSRR range LDO heat, extra BOM, sequencing, and rail-partitioning work Analog, RF, clock, PLL, ADC/DAC, reference, and sensor branches

This comparison is a design heuristic; device curves and measurements decide the result. TI’s architecture comparison describes converter-only operation as the efficiency winner and buck-plus-LDO as a noise/efficiency compromise (TI comparison).

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What the post-buck LDO actually fixes

An LDO attenuates disturbances conducted into its input according to its frequency-dependent power-supply rejection ratio (PSRR). A useful first estimate is:

VOUT noise ≈ noise at LDO input × 10(−PSRR/20)

For example, 60 dB PSRR is an idealized 1,000:1 attenuation at the stated frequency. It is not 60 dB across the spectrum. Check the LDO curve at the buck’s fundamental switching frequency, harmonics, spread-spectrum sidebands, and any frequency where the load is sensitive. PSRR also changes with load current, output capacitor, layout parasitics, and input-to-output headroom. Analog Devices explains these operating-corner effects in its LDO operational-corners article and discusses noise mechanisms in AN-1120.

An LDO only addresses disturbances that reach it through the supply path. It does not stop radiated energy from a buck switch node, magnetic coupling from an inductor, ground bounce, or noise injected through signal traces. A poor PCB can therefore erase much of the theoretical benefit.

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Headroom: the constraint that determines whether the cascade works

Use the guaranteed, worst-case dropout specification rather than a typical value:

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VBUCK(min) ≥ VOUT(max) + VDO(max) + regulation margin

Evaluate minimum battery or input voltage, maximum load, temperature extremes, buck tolerance, PCB voltage drop, and load-transient droop. The LDO may regulate at nominal conditions yet lose regulation—or lose useful PSRR—during a low-input or high-current event.

More headroom can improve PSRR, but every extra volt is dissipated as heat. Analog Devices notes that PSRR depends strongly on the input-output difference; its ADP5003 is an example of an integrated device that adaptively manages LDO headroom.

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Power, efficiency, and thermal cost

For a linear post-regulator:

PLDO ≈ (VBUCK − VOUT) × IOUT + VIN(LDO) × IQ

The voltage-drop term normally dominates. Approximate efficiencies are:

  • ηLDO ≈ VOUT/VBUCK (excluding quiescent current).
  • ηTOTAL ≈ ηBUCK × ηLDO.

Worked example: 12 V to 3.3 V at 1 A

With a 12 V input, a 5 V buck intermediate rail, 3.3 V output, and 1 A load:

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  • PLDO ≈ (5 − 3.3) × 1 = 1.7 W.
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  • If buck efficiency is assumed to be 90% for illustration, ηTOTAL ≈ 59%.

The 1.7 W must be removed through the package and PCB copper. A direct 12 V-to-3.3 V LDO would dissipate 8.7 W, so the cascade is far cooler than an input LDO but less efficient than a buck alone. Actual buck efficiency must come from the selected device’s curve at the intended voltage, frequency, and load.

Small-drop example: 3.6 V to 3.3 V at 50 mA

A direct LDO dissipates only (3.6 − 3.3) × 0.05 = 15 mW. A switching stage could add more parts and EMI than the application needs.

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When buck plus LDO is the right architecture

  • The input-to-output conversion is substantial, making a direct LDO hot.
  • The final load is noise-sensitive: a precision ADC or DAC, voltage reference, RF synthesizer, PLL, clock, or low-level sensor.
  • A low-noise buck alone does not meet the measured noise or spur requirement.
  • A guaranteed intermediate voltage leaves enough dropout and PSRR headroom without excessive LDO dissipation.
  • Only a low-current sensitive branch needs cleaning.
  • Extra components, board area, and sequencing work are acceptable.

In mixed-signal equipment, the usual best implementation is a buck for the main or digital rail and a separate LDO branch for the sensitive island—not one large LDO feeding the whole board.

When a buck alone is better

  • The load is digital or otherwise tolerant of the converter’s measured ripple.
  • Battery life, efficiency, or thermal margin dominates.
  • The buck’s output noise, EMI, and load-transient behavior meet the system limit at the load.
  • Post-LDO dissipation would be significant.
  • The board can control switching-current loops and isolate sensitive traces.

Modern low-noise bucks may make the second stage unnecessary. TI’s TPS62912, for example, is specified as a 3 V-to-17 V, 2 A buck with optional ferrite-bead filter compensation, less than 10 µV RMS ripple after the bead under specified conditions, and more than 65 dB PSRR to 100 kHz. Those specifications do not predict every switching harmonic or layout.

When an LDO alone is better

  • The source voltage is already close to the target.
  • Load current is low and calculated dissipation is comfortably within the package and PCB thermal limits.
  • Minimum component count and absence of switching EMI are priorities.
  • The upstream rail is quiet and within the LDO’s operating and absolute-maximum ranges.

Do not equate an LDO’s low output-noise headline with the complete system noise. Reference, error-amplifier, resistor, capacitor, load-transient, and board-coupling noise all contribute.

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Choosing the intermediate buck voltage

Choose the lowest buck output that satisfies the worst-case LDO requirement:

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VBUCK(min under all conditions) > VOUT(max) + VDO(max) + desired margin

A convenient 5 V intermediate rail may waste power at a 3.3 V output. A 3.6 V or 3.8 V rail can reduce heat if tolerance and PSRR remain adequate. Conversely, setting the buck barely above 3.3 V can cause dropout during a transient and remove the LDO’s useful high-frequency rejection.

A practical design workflow

  1. Define the rail. Record minimum, nominal, and maximum input; output tolerance; continuous, peak, and standby current; allowed ripple and measurement bandwidth; sensitive frequencies; startup requirements; ambient temperature; and available copper.
  2. Test direct-LDO heat. Calculate PLDO = (VIN − VOUT) × IOUT, then estimate TJ ≈ TA + PLDO × θJA using thermal data for the actual PCB.
  3. Set the buck voltage. Apply the worst-case headroom equation and include transient droop, tolerances, and PCB drop.
  4. Compare spectra and PSRR. Inspect the LDO curve at the buck fundamental, harmonics, beat frequencies, and the actual load current and headroom. If PSRR is only specified strongly to 100 kHz while the buck switches at 2.2 MHz, do not claim complete 2.2 MHz removal.
  5. Verify capacitors and stability. Follow capacitance, voltage rating, ESR, DC-bias derating, placement, inductor, compensation, and layout requirements for both devices.
  6. Review sequencing. Check soft-start, enables, power-good, output discharge, inrush, shutdown, and reverse current. Some LDOs need reverse-current protection or isolation when the buck input can turn off while the LDO output remains powered; see the Analog Devices LDO application tutorial.
  7. Measure at the load. Test DC accuracy, ripple with controlled probing, broadband noise, switching spurs, load transients, startup/shutdown, minimum input, maximum load, temperature extremes, and relevant conducted or radiated EMI.
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Common design mistakes

Relying on a headline PSRR number

PSRR is frequency- and condition-dependent. Overlay the buck spectrum with the LDO curve at the real operating point.

Using typical dropout as the design limit

Use maximum guaranteed dropout at maximum current and temperature, then add margin for tolerances and transients.

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Adding excessive headroom

Extra voltage can improve rejection but increases LDO heat linearly. Optimize for the minimum voltage that satisfies both PSRR and thermal limits.

Assuming the LDO eliminates EMI

The buck’s switch node, inductor, input loop, and return currents still radiate and couple. Keep hot loops small, separate sensitive circuitry, and manage grounding and filtering.

Putting a large LDO after the whole-board buck

High-current digital loads can make the LDO hot and inject transients into the quiet rail. Partition the sensitive branch instead.

Substituting a ferrite bead for regulation

A bead and capacitor form a frequency-selective filter; they do not provide DC regulation or low-frequency rejection. Use impedance and resonance analysis, especially with LC or π filters.

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Alternatives to a discrete cascade

  • Low-noise buck only: lowest heat when its measured ripple and EMI meet the requirement.
  • Buck plus bead or LC filter: lower DC loss than an LDO for predominantly high-frequency ripple, but no final-voltage correction and possible resonance.
  • Integrated buck-plus-LDO PMIC: can coordinate enable, power-good, sequencing, and adaptive headroom while reducing area; it concentrates thermal and supply-chain risk.
  • Separate buck rails: often cleaner than feeding the entire board through one large post-LDO.

Decision checklist

  • Noise-sensitive load? If no, start with a buck when voltage drop or current makes switching worthwhile.
  • Direct-LDO dissipation acceptable? If yes and the input is suitable, an LDO may be simplest.
  • Buck meets noise at the load? If yes, omit the LDO.
  • Enough guaranteed LDO headroom? If no, change the intermediate voltage or topology.
  • PSRR effective at the actual switching frequencies? If no, consider a low-noise buck, bead, LC filter, layout changes, or a different LDO.

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