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In Analog Devices’ LT8392 board comparison, the single-hot-loop layout cut the illustrated loop area to about half that of the dual-hot-loop layout and produced 5 dBµV lower conducted emissions above 30 MHz. The two boards had nearly the same hottest-component temperature under the reported thermal test. Those results apply to the tested boards and conditions—not to every four-switch buck-boost design.
What the hot-loop comparison means
A four-switch buck-boost converter uses one inductor and can operate as a buck when its output is below its input, as a boost when its output is above its input, or with all four switches active when the voltages are similar. The comparison by Analog Devices engineers Yonghwan Cho and Keith Szolusha examines two LT8392 board layouts: one with two hot loops and one arranged to create a single, more compact loop. Analog Devices’ LT8392 layout comparison reports the specific measurements and board configurations.
A hot loop is a high-current path in which switching causes current to change rapidly (high di/dt). The changing current can generate electromagnetic noise. Reducing the loop’s physical area can reduce the area acting as a source of that noise, but the rest of the layout and the converter’s operating conditions still matter.
How the two layouts differ
| Layout feature | Dual hot loop | Single hot loop |
|---|---|---|
| Hot-loop capacitors and MOSFETs | Ceramic hot-loop capacitors sit symmetrically on both sides of the center MOSFETs, forming two loops. | Hot-loop capacitors sit on one side of the MOSFETs; one MOSFET is rotated 90 degrees to compact the loop. |
| Switch-node connection to inductor | SW1 and SW2 connect to the inductor through vias to lower layers. Exposed copper can spread heat, but may also couple noise. | The illustrated connection reaches the inductor without switch-node vias and avoids exposed bottom-layer switch-node copper. |
| Illustrated loop area | Reference layout in the comparison. | About half the dual-loop area in the article’s illustration; this is not a universal target for other boards. |
| Conducted emissions | The average voltage-method result exceeded the cited Class 5 limit in the 68 MHz to approximately 108 MHz region; readings above 30 MHz were higher than for the single-loop board. | Reported 5 dBµV lower voltage-method conducted emissions above 30 MHz, and both peak and average voltage-method results met the cited limit in this comparison. |
| Radiated emissions | Nearly the same overall as the single-loop board, with a spike near 90 MHz about 5 dBµV/m higher. | Nearly the same overall as the dual-loop board, apart from the dual-loop board’s higher spike near 90 MHz. |
| Thermal result | The boost-side bottom MOSFET was the hottest component. | The hottest-component temperature was almost the same as in the dual-loop board under the stated thermal test. |
What the reported tests show—and what they do not
For its conducted-emissions comparison, Analog Devices used a CISPR 25-compliant chamber, a 12 V, 8 A output, and a 13 V input, putting the converter into four-switch operation. Under those conditions, the single-loop board measured 5 dBµV lower voltage-method conducted emissions above 30 MHz. The dual-loop board’s average result exceeded the cited limit from 68 MHz to approximately 108 MHz, while the single-loop board met the cited peak and average voltage-method limit. These are measurements from the named LT8392 boards, not a guaranteed improvement for another controller, board stack-up, or vehicle installation.
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The radiated-emissions measurements were nearly alike overall. The notable reported difference was a dual-loop spike near 90 MHz, about 5 dBµV/m above the single-loop result. The thermal images were taken with a 9.4 V input, 12 V output, and spread-spectrum frequency modulation enabled. The authors describe this as the lowest point in the four-switch operating region before transition to two-switch boost. The hottest-component temperatures were almost the same in that comparison, and the article attributes lower switching loss to the single layout’s smaller loop.
Layout practices that apply beyond the LT8392 example
Texas Instruments’ September 2023 application note, “Layout Optimization of 4-Switch Buck-Boost Converters” (SLVAFJ3), groups layout concerns into high-di/dt loops, high-dv/dt nodes, and noise-sensitive traces. It identifies the input switching loop around the input capacitor and buck-side MOSFETs, and the output switching loop around the output capacitor and boost-side MOSFETs.
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- Minimize the input and output switching-loop areas by placing their capacitors and MOSFETs so high-current paths close locally.
- Keep SW1 and SW2 copper areas small where practical. These high-dv/dt nodes can capacitively couple noise into nearby circuitry.
- Route current-sense, input- and output-sense, and control traces away from noisy switching paths.
- Balance compact copper against current capacity and heat spreading; removing copper or changing layer connections can affect thermal performance as well as coupling.
Controller-specific sense routing
For the LM5177, TI recommends Kelvin connections to the current-sense resistor; routing the differential sense lines in parallel to the IC; keeping them away from switch-node and gate-drive areas; and placing the sense-filter capacitor close to the controller pins. These details come from TI’s LM5177 four-switch buck-boost layout tip. Treat them as LM5177 guidance, not rules to copy unchanged for every controller; consult the chosen device’s datasheet and reference layout.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.A practical layout and validation sequence
- Mark the critical paths on the schematic. Identify the input and output switching loops, fast-voltage switch nodes, and noise-sensitive measurement or control signals.
- Place the power components to close the loops. Arrange local capacitors, MOSFETs, and inductor around short, direct high-current paths, using the controller’s recommended layout as the starting point.
- Limit noisy copper without compromising the design. Minimize loop area and exposed switch-node area while meeting current, thermal, and manufacturing requirements.
- Route sensitive signals deliberately. Keep sense and control traces away from switching nodes and gate-drive paths; apply any Kelvin or filter-capacitor placement requirements specified for the selected controller.
- Validate the assembled board. Check emissions, switch-node ringing, component temperature, and converter stability under the intended input, output, load, and operating modes. A compact drawing alone cannot establish compliance.
The LT8392 comparison offers evidence that a single, smaller hot loop can improve conducted emissions above 30 MHz without an evident hottest-component temperature penalty under the authors’ thermal condition. It does not establish a universal maximum loop area, prove that all single-loop layouts will pass a particular compliance test, or compare every controller under identical conditions.
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