SD/SDIO 3.0 controller IP lets a chip or module design combine SD memory access with SDIO input/output functions on an SD interface. In a November 17, 2009 report, EE Times said Arasan Chip Systems offered a combo controller IP intended for high-performance add-on cards and embedded modules, including wireless applications. The report’s specifications are historical claims, not confirmation of a currently available product or current capabilities.
What SD/SDIO controller IP does
Controller IP is licensed design technology used when implementing interface functions in a chip or system. It is not a finished SD card, Wi-Fi adapter, or other consumer wireless product. The “combo” concept described by EE Times was to support both SD memory and SDIO functions, allowing a design to combine storage with input/output capability.
SD memory provides the storage side of the interface; SDIO provides a way to connect input/output functions. A device built around such a design could therefore pair memory with functions such as wireless connectivity, subject to the rest of the system’s hardware and software implementation.
What Arasan’s 2009 announcement reported
EE Times reported that Arasan Chip Systems claimed to offer an SD/SDIO 3.0 combo device controller IP. The article attributed the following capabilities to it; they should be read as claims reported in 2009, not independently verified specifications or a current datasheet.
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| Area | What the 2009 report said |
|---|---|
| Memory standards and capacity | Support for SDSC, SDHC, and SDXC memory capacities, with the controller reported to address up to 2 TB of memory. The capacity is a dated report claim, not a current guarantee. |
| Interface modes and rates | UHS-I support, including DDR at 50 MBps and SDR up to 104 MBps; the article also reported peak bandwidth of 832 Mbps in association with UHS-I. |
| SD and SDIO commands | Support for SD memory and SD I/O 3.0 commands. |
| I/O functions | Scalability to as many as seven I/O functions. |
| Data movement and operation | Asynchronous interrupts, suspend/resume, bus mastering, and scatter/gather DMA. |
| Protection | Support for standard data-protection schemes; the report did not specify which schemes. |
The figures and features above come from Jean-Pierre Joosting’s November 17, 2009 EE Times report. The article provides no independent test results, detailed implementation conditions, or evidence that the IP remains available.
Why wireless applications were mentioned
The report framed the controller for high-performance add-on cards and embedded modules that combine memory and I/O. It named Wi-Fi, GPS, LTE, and WiMAX as examples, along with location-aware functions and multimedia accelerators. These examples show the application context in the 2009 announcement; they should not be taken as a description of current wireless-market priorities or proof of compatibility with any particular modern device.
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The underlying design idea was integration: a module could use SD/SDIO capabilities to provide storage and an I/O function through the same general interface. Whether that was suitable for a specific product would depend on the controller revision, host interface, software support, electrical design, and system requirements—details the report does not establish for a present-day implementation.
What the report does not establish
- Whether Arasan currently offers or licenses this specific IP.
- Its present-day specifications, supported revisions, or compatibility with modern hosts and devices.
- Licensing terms, implementation requirements, or software and driver availability.
- Independent validation of the reported capacity, data rates, bandwidth, or feature set.
For historical context, the report also cited an expectation of more than $2 billion in 2009 service-provider revenue from location-aware services, attributing the projection to unnamed analysts. It did not identify the original study or publisher, so the figure is not a verified market statistic and says nothing about today’s market.
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What to check when evaluating SD/SDIO controller IP
A design team assessing an SD/SDIO controller should verify the actual IP revision and its documentation rather than rely on a historical announcement. Relevant questions include:
- Which SD memory and SDIO specification revisions, modes, and transfer rates are supported?
- What memory capacity and number of I/O functions are supported by the specific licensed implementation?
- How are interrupts, suspend/resume, bus mastering, and DMA handled, and what integration dependencies apply?
- Which data-protection schemes are implemented, and what does “support” require from the rest of the system?
- Are current licensing, software, verification materials, and host-side compatibility documented?
The 2009 article gives only partial historical answers to these questions. It names no competing product and does not support a current product comparison.
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