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Fix the driver behind crashes, sound loss and screen glitchesFind Drivers →Clear out junk files and repair common Windows errorsFree Scan →A neural-network (NN) inference engine runs a model that has already been trained, applying its learned weights to new sensor inputs to produce outputs. In December 2019, AImotive announced shipments of aiWare3P, an automotive inference accelerator delivered as synthesizable semiconductor IP—not as a finished product for consumers or a complete vehicle system. The announcement described work aimed at L2 and L2+ applications and research into more advanced sensor applications; it did not establish deployed Level 3 capability.
What does an NN inference engine do?
Inference is the step in which a trained neural-network model processes new data. In a vehicle, that data may come from cameras or other sensors; the model applies its existing weights to the input and produces results for downstream vehicle software. Training is different: it creates the model’s weights and topology, typically outside the vehicle. AImotive’s 2019 explanation describes the vehicle-side engine as applying trained weights, not learning a new model while driving. (AImotive, “Inference at the Edge,” April 12, 2019.)
AImotive argued that automotive inference should begin as soon as sensor data arrives rather than waiting to collect a large batch. That framing makes latency and predictable timing important alongside throughput: an accelerator must keep processing inputs as they arrive, with sustained operation and power use also in view. These are AImotive’s design priorities, not independent findings about aiWare3P’s performance.
What did AImotive ship in 2019?
EE Times reported on December 24, 2019, that AImotive had started shipping its aiWare3 neural-network hardware inference IP to lead customers. Its article describes the aiWare3P core as synthesizable RTL: chip designers could integrate it into a system-on-chip (SoC), or use it in a standalone accelerator implementation. In either case, the shipped item was licensable design IP for semiconductor customers, not a retail accelerator or a vehicle system. (EE Times, December 24, 2019.)
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The report positioned the core for high-resolution automotive vision, including multi-camera and heterogeneous-sensor workloads. It said the product was being deployed in L2/L2+ solutions and that more advanced sensor applications were under study. That launch-era wording is not evidence that aiWare3P enabled a production Level 3 system, or that the product or those programs remain available today.
How was aiWare3P intended to fit into a chip?
The 2019 report described a purpose-built accelerator architecture intended to reduce reliance on host-CPU and shared-memory resources. AImotive’s reported architecture features included:
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- Deterministic dataflow management and a parallel, memory-centric design.
- Tile-based implementation and real-time data compression.
- Cross-coupling between convolution and function engines.
These are descriptions from the launch coverage, not independently tested results. They help explain the intended design approach: accelerate neural-network workloads locally while managing the movement and timing of data, rather than relying entirely on a general-purpose host processor.
How did models reach the accelerator?
According to EE Times, the software development kit accepted models in Khronos NNEF and ONNX formats. It included direct compilation, FP32-to-INT8 quantization, and tools for analyzing deep neural networks. In practical terms, those tools formed a path from a model created by developers to a version compiled and optimized for the hardware. The report does not establish current SDK availability or support for later versions of either format.
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What performance did AImotive report?
EE Times relayed the following AImotive figures in 2019. They are company-reported specifications and claims, not independently verified comparative measurements:
| Reported claim | Qualification |
|---|---|
| Up to 16 TMAC/s per core, described as more than 32 TOPS | AImotive’s reported figure at 2 GHz; the 2019 report does not provide independently verified results. |
| More than 50 TMAC/s, described as more than 100 INT8 TOPS | AImotive’s claim for multi-core or multi-chip implementations. |
| Up to 100 times more on-chip memory bandwidth than other hardware NN accelerators | AImotive’s comparative claim; the report does not supply independently verified apples-to-apples results. |
| Up to 95% sustained efficiency | AImotive’s claim for complex DNNs with large inputs. |
The article said AImotive planned to publish a full update to its public benchmark results in Q1 2020; it does not establish whether that update appeared. Peak throughput figures alone also do not show how a chip performs on a particular vehicle workload. A meaningful comparison would need comparable models, input sizes, batch size, timing conditions, power, and measurement methods.
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- Equipped with 6 TOPS computing power, easy to convert a variety of neural network models based on TensorFlow, MXNet, PyTorch, and Caffe frameworks.
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What automotive safety claims did the launch make?
The report said aiWare3P was designed for AEC-Q100 extended-temperature operation and included features intended to help users achieve ASIL-B and higher certification. It also discussed component use within ISO 26262-certified subsystems at ASIL A, B, and above. These statements describe design intent and subsystem context; they do not establish that the accelerator itself was certified to a particular ASIL level. Certification applies to a safety case and its defined system context, not simply to an accelerator’s performance claims.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.Which customers and projects were named?
EE Times identified Nextchip as a customer for its forthcoming Apache5 Imaging Edge Processor. It also reported that AImotive and ON Semiconductor were collaborating on an advanced heterogeneous sensor-fusion demonstration. These were programs described in 2019; the report does not establish their subsequent outcomes, present-day product availability, or current partner relationships.
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How should you evaluate an automotive inference accelerator?
For a vehicle program, a useful comparison goes beyond a headline TOPS number. Check the factors that affect the intended workload and integration:
- Latency and timing: End-to-end response time and determinism for the system’s sensor-to-output path.
- Real workload throughput: Sustained performance on high-resolution, batch-size-one inputs, rather than only peak theoretical throughput.
- System cost in power and resources: Power consumption, memory bandwidth, and the amount of host-CPU work required.
- Software path: Supported model formats, quantization options, compiler behavior, and analysis tools.
- Automotive integration: Temperature requirements and the evidence needed to support functional-safety integration.
- Delivery form: Licensed IP integrated into an SoC versus a separate hardware accelerator, with corresponding differences in design and system integration.
The 2019 aiWare3P report offers claims across several of these dimensions, but not independently verified, apples-to-apples comparisons with other accelerators. A vehicle developer would need workload-specific evidence and safety documentation for the intended system before drawing a product-fit conclusion.
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