A capacitor connected to an op-amp can filter a signal, set an integrator’s behavior, block DC, decouple the power supply, or destabilize the output. Its job depends on which two circuit nodes it connects—not simply on the fact that it is near an op-amp.
Identify where the capacitor connects
Trace both capacitor leads on the schematic. Is it across the feedback resistor, the only feedback element, in series with the input, on the output, or across the supply pins? That placement is the fastest clue to its purpose.
| Location | Likely role |
|---|---|
| In parallel with the feedback resistor | Reduces high-frequency closed-loop gain; may define a low-pass response or, in some designs, contribute to compensation. |
| As the feedback element, with an input resistor | Creates an integrator; a practical version usually adds a resistor in parallel with the capacitor. |
| In series with the input | Blocks DC; with the resistance seen by the capacitor, creates a high-pass response. |
| In an input or feedback network with other components | Shapes frequency response, possibly as a differentiator or lead/lag network. |
| From output to ground or another load node | Loads the op-amp capacitively and may cause overshoot, ringing, or oscillation. |
| Between supply pins and ground | Decouples the supply; it is normally not part of the signal feedback path. |
The basic reason is that capacitor impedance falls as frequency rises. Its impedance magnitude is |ZC| = 1/(2πfC), where f is frequency and C is capacitance. An ideal capacitor is open to steady DC but increasingly conducts changing signals as frequency increases. In a feedback network, that changes the gain and phase with frequency.
Capacitor across the feedback resistor
For an inverting amplifier with input resistor Rin, feedback resistor Rf, and capacitor Cf in parallel with Rf, the feedback impedance is approximately Zf = Rf/(1+sRfCf). The idealized closed-loop gain is:
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Vout/Vin = −(Rf/Rin)/(1+sRfCf)
At low frequencies, the capacitor has relatively high impedance and the gain approaches −Rf/Rin. At higher frequencies it lowers the feedback impedance, strengthening feedback and reducing closed-loop gain. The nominal first-order pole is fp = 1/(2πRfCf); this is an approximation that assumes the stated topology and neglects op-amp bandwidth and parasitics.
Example
With Rin = 10 kΩ, Rf = 100 kΩ, and Cf = 100 pF, the low-frequency gain is about −10 and the nominal pole is about 15.9 kHz. This illustrates the calculation; it is not a universal component recommendation.
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This arrangement can set a bandwidth limit, reduce high-frequency noise, or compensate for input and stray capacitance. It is not automatically a stability fix: suitability depends on the amplifier’s architecture, noise gain, feedback resistance, parasitics, and required bandwidth. Analog Devices describes feedback capacitors as a way to limit bandwidth in some voltage-feedback designs and warns that comparable inverting-input capacitance can cause peaking or oscillation in current-feedback amplifiers (Analog Devices, Current Feedback Amplifier Do’s and Don’ts).
Capacitor as the feedback element: an integrator
When an input resistor feeds the inverting input and a capacitor connects output to that input, the ideal circuit is an inverting integrator:
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Vout/Vin = −1/(sRC), or Vout(t) = −(1/RC)∫Vin(t)dt.
- A constant input produces a ramp output.
- A square-wave input produces a triangular output while the amplifier remains in its linear range.
- A DC offset, input bias current, or capacitor leakage can make the output drift until it reaches an output rail.
A practical integrator commonly puts a resistor Rf in parallel with the feedback capacitor. The resistor supplies a DC feedback path and keeps the circuit from integrating tiny DC errors indefinitely. The circuit behaves approximately as an integrator over a defined band; the low-frequency transition is roughly 1/(2πRfCf). Real limits also include output swing and current, offset voltage, bias current, leakage, dielectric absorption, and the capacitor’s initial charge. Microchip discusses integrator and differentiator arrangements among standard op-amp applications (Microchip, Operational Amplifier AC Specifications and Applications).
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Capacitors at the input: coupling, filtering, and differentiation
A capacitor in series with an input signal can block DC while passing AC. It must be paired with a bias-return path so the op-amp input settles to a defined voltage; otherwise the input may float and the output can move to a rail. Together with the effective resistance seen by the capacitor, it forms a high-pass corner, approximately fc = 1/(2πRC). Use the Thevenin resistance seen across the capacitor, not whichever resistor looks most prominent on the page.
A differentiator uses a more specific network: an input capacitor and a feedback resistor give the ideal inverting relation Vout/Vin = −sRC, or Vout = −RC(dVin/dt). A ramp can produce an approximately constant output, while transitions in a square wave produce pulses. Since ideal gain rises without bound with frequency, a bare differentiator amplifies noise and is difficult to stabilize. Practical versions add resistance in series with the input capacitor and capacitance in parallel with the feedback resistor to limit the operating band.
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A capacitor across an input resistor or attached to a reference node can instead create a lead/lag or filtering network. Whether gain rises or falls depends on the complete topology. A capacitor by itself does not specify a useful cutoff or response; the surrounding impedances matter.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.Capacitor on the output: check stability
A capacitor from the op-amp output to ground, a cable, an ADC input, or another capacitive load may add phase lag to the feedback loop. Depending on the op-amp, load, closed-loop configuration, capacitance, and parasitics, the result can be peaking, overshoot, ringing, slow settling, or sustained oscillation. It does not mean every output capacitor will make every op-amp oscillate. TI explains that capacitive loading can add a pole and reduce phase margin; Microchip also describes effects including reduced bandwidth, slew rate, and increased power consumption (TI, Capacitive Load Drive: Stability and Compensation; Microchip, Driving Capacitive Loads With Op Amps).
Common remedy: output isolation resistor
A resistor between the op-amp output and the capacitive load can reduce the direct capacitive burden. In a common arrangement, take the feedback connection from the op-amp side of the resistor so the resistor does not introduce a DC gain error. The resistor and load capacitance still affect output response, and transient current through the resistor can create a voltage drop. Choose the value using the specific amplifier’s stability guidance, load, and settling requirements—not from capacitance alone. TI discusses isolation resistors and their limitations in its stability guidance (TI, Op-Amp Stability: Capacitive Loads).
Other design options
- Select an op-amp characterized for the expected capacitive load and closed-loop gain.
- Reduce load capacitance or reduce closed-loop bandwidth if the application permits.
- Use a manufacturer-supported feedback compensation network where appropriate.
- Check output-current and slew-rate limits as well as stability; a stable circuit can still settle too slowly or fail to drive the load.
An op-amp’s “unity-gain stable” description does not guarantee stability with every output capacitance. Consult its capacitive-load plots, recommended isolation resistor, phase-margin information, and test conditions.
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A capacitor between an op-amp supply pin and ground, or across the supply rails, is usually a decoupling capacitor. It provides local transient current and reduces high-frequency supply impedance and supply-borne noise. It is not normally a signal-filter capacitor or an output load. Follow the op-amp data sheet for value and placement, and keep supply bypass connections close to the device’s pins.
Quick Recap
Analyze an unfamiliar schematic
- Mark both capacitor nodes. Determine whether the part is in series with the signal, across a feedback component, from output to load or ground, or on the supply.
- Consider DC first. Treat an ideal capacitor as open and check that the op-amp inputs still have valid bias paths and the feedback network still controls the output.
- Analyze AC behavior. Use ZC = 1/(j2πfC) and find the effective resistance seen by the capacitor to estimate poles or zeros.
- Check the complete amplifier. Compare the intended signal bandwidth with op-amp bandwidth, closed-loop gain, and noise gain. Stability is a loop-response question, not just a matter of the signal-gain number.
- Verify the real load. Check manufacturer guidance for capacitive-load stability and output drive, then simulate and test with the actual load and layout.
Troubleshoot common symptoms
- Output slowly ramps with little or no input: In an integrator, inspect for a missing DC feedback path, input offset or bias current, capacitor leakage, initial charge, or contamination on the board.
- Ringing appears after connecting a capacitor: Investigate capacitive-load stability, feedback takeoff, and the recommended isolation or compensation method.
- Oscillation occurs at some gains but not others: Check whether the device is unity-gain stable and review its stability against noise gain, not only signal gain.
- A simulated design is stable but the board is not: Account for PCB and probe capacitance, capacitor ESR/ESL, supply bypassing, trace routing, and model limitations. Use a short probe ground connection when checking for high-frequency ringing.
- A large capacitor produces little filtering: Check the resistance it works against, whether feedback holds its node at low impedance, and whether the resulting pole lies in the signal band.
- The amplifier becomes slower after adding feedback capacitance: Reduced high-frequency gain and bandwidth may be the intended effect; excessive capacitance can also lengthen settling time.
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