Yes. A phototransistor-output optocoupler can translate a logic signal between voltage domains while keeping the two grounds galvanically isolated. The practical circuit is an inverting, open-collector interface: an input-side LED is driven through a resistor, and an output-side pull-up resistor converts the phototransistor’s current into a logic voltage.
This works well for slow GPIO, alarm, enable and status signals. It is usually the wrong tool for fast clocks, bidirectional buses or low-power translation when isolation is not required. In those cases, use a logic optocoupler, digital isolator or dedicated level-shifter IC instead.
What the circuit does
A conventional optocoupler has an LED on one side of an isolation barrier and a phototransistor on the other. The input circuit and output circuit use separate grounds and can use different supply voltages.
When the LED is off, the phototransistor is off and the output pull-up raises the output node. When the LED is on, the phototransistor conducts and pulls the node toward the output-side ground. A single phototransistor stage therefore normally inverts the signal.
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| Input LED | Phototransistor | Output |
|---|---|---|
| Off | Off | High through the pull-up |
| On | On | Low |
The output high level is established by the output-side pull-up supply, not by the input voltage. Without that supply and resistor, the optocoupler does not create a usable logic output.
Basic one-way circuit
Input side Output side
V_IN ── R_LED ──►|── GND_IN V_OUT
LED │
R_PULLUP
│
├──── Logic output
│
Collector
┌───────┘
│ Phototransistor
└──── Emitter
│
GND_OUT
- Keep
GND_INandGND_OUTseparate when isolation is required. - Connect the collector to the output node and the emitter to
GND_OUT, unless the selected datasheet specifies another arrangement. - Choose the pull-up voltage within the phototransistor’s collector-emitter voltage rating.
- Check collector current, power dissipation and the receiving input’s logic thresholds.
3.3-V input to 5-V output example
LED resistor
Assume a 3.3-V GPIO, an LED forward voltage of 1.2 V at the selected current and a target LED current of 5 mA:
RLED = (VDRIVE − VF) / IF = (3.3 − 1.2) / 0.005 = 420 Ω
A standard 430-Ω resistor is a reasonable nominal choice, provided the optocoupler’s forward-current limits and the GPIO’s source-current rating permit it. The actual design must use the LED forward-voltage range and the optocoupler’s guaranteed CTR at the intended current and temperature.
Output side
Connect a 5-V pull-up resistor from the collector/output node to the output-side 5-V supply. The resulting signal is an isolated, inverted 5-V logic signal. Verify that the low level meets the receiver’s VIL(max) and that the high level meets VIH(min) after accounting for leakage and loading.
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5-V input to 3.3-V output example
Reverse the supply arrangement: drive the LED from the 5-V side through its current-limiting resistor, and connect the collector pull-up to 3.3 V on the output side. The phototransistor then produces an isolated, inverted 3.3-V signal. The 3.3-V pull-up does not expose the receiving input to 5 V, but the optocoupler’s collector-emitter rating and leakage still require verification.
Choosing the LED resistor
Use:
RLED = (VDRIVE − VF) / IF
- VDRIVE: the worst-case voltage delivered by the source.
- VF: the LED forward voltage at the selected current, including its specified range.
- IF: the current needed to meet the optocoupler’s CTR and timing specifications.
Also check the GPIO’s maximum source or sink current, resistor power (P = IF2R), temperature, LED aging and the source’s voltage tolerance. Do not drive the LED directly from a GPIO without current limiting.
Choosing the output pull-up resistor
The phototransistor must sink the pull-up current while producing an acceptable low voltage:
IC = (VOUT − VOL) / RPULLUP
Its available current is approximately:
IC ≤ CTRMIN × IF
Use the minimum guaranteed CTR at the actual LED current, collector voltage and temperature—not a typical headline value. Include receiver leakage, external loads and a design margin.
For example, with a 5-V pull-up, a target VOL of 0.4 V, 20% minimum CTR and 5 mA LED current, the nominal available collector current is 1 mA. If the design limits the target sink current to 0.5 mA, then:
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RPULLUP ≥ (5 − 0.4) / 0.0005 = 9.2 kΩ
A 10-kΩ pull-up may work for a slow, lightly loaded signal, but it is only an example. The final value must satisfy both the guaranteed CTR calculation and the required rise time.
Pull-up value versus speed
The rising edge is produced by the resistor charging the total output capacitance:
tr ≈ 2.2 × RPULLUP × CTOTAL
- A larger resistor reduces steady-state low-level current but slows the rising edge and increases noise sensitivity.
- A smaller resistor gives a faster rise but demands more collector current and increases low-state dissipation.
- Long traces, cables, multiple inputs and probe capacitance all increase
CTOTAL.
This is the same open-drain trade-off described by Toshiba’s level-shifting application note and TI’s open-drain translation guidance.
Why CTR is the critical parameter
CTR is approximately IC/IF × 100%, but it is not a fixed transistor gain. It varies with LED current, temperature, production lot, device bin, aging and collector voltage. A design based on typical CTR can pass a bench test and fail with another part or at temperature extremes.
High CTR also does not automatically mean high speed. Deep phototransistor saturation can create stored charge and lengthen turn-off time; photodarlington devices generally trade speed for apparent gain. Vishay discusses the relationship between CTR and switching behavior for its transistor-output optocoupler families, including the SFH615A product information.
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Speed, delay and data-rate limits
Phototransistor optocouplers are commonly suited to GPIO status, enables, alarms, relay control and slow serial signals. They can be unsuitable for fast SPI, clocks, demanding PWM, memory buses or timing-sensitive handshakes.
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For faster isolated logic, consider high-speed devices such as Vishay’s 10-MBd family (VO0600/VO0601/VO0611 information) or Broadcom’s 10-Mb/s ACPL-268KL, whose application list includes voltage-level shifting.
Polarity and non-inverting designs
The basic stage is active-low. If the system requires non-inverting behavior, add an output-side inverter, use two optocoupler stages, select a logic optocoupler with the required polarity, or invert the interpretation in firmware. Two stages add delay, parts and another timing path; the circuit is not a drop-in non-inverting translator.
Isolation is more than the voltage rating
An optocoupler interrupts galvanic ground-current paths, but it does not eliminate capacitive coupling or common-mode transients. Evaluate:
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- Rated isolation voltage and continuous working voltage.
- Creepage and clearance on the package and PCB.
- Functional versus reinforced or safety-rated insulation.
- Certification for the applicable system standard.
- Common-mode transient immunity and barrier layout.
- Whether shields, cables, test equipment or other signals accidentally reconnect the grounds.
Isolation-test voltage alone does not establish safety compliance. Follow the component certificate and the system standard for the required working voltage, pollution degree and insulation category.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.Power-off and startup behavior
Check every combination in which one side is powered and the other is off. Protection structures in the receiver or translator can back-power an unpowered rail, create an undefined output or cause a false transition. Keep the output side from being driven through an unpowered input when the receiving device lacks suitable power-off protection.
Dedicated translators may specify partial-power-down behavior; for example, TI documents such features for the TXS0101. The exact limits remain device-specific.
Phototransistor, logic optocoupler or level-shifter IC?
| Requirement | Phototransistor optocoupler | Logic optocoupler | Dedicated level-shifter IC | MOSFET/open-drain translator |
|---|---|---|---|---|
| Galvanic isolation | Yes | Yes | Usually no | No |
| High speed | Limited | Good to very good | Very good | Moderate to good |
| Bidirectional signaling | Difficult | Part-dependent | Common | Common for suitable buses |
| CTR dependence | High | Internally managed | None | None |
| Typical polarity | Inverting | Part-dependent | Part-dependent | Often non-inverting for buses |
| Best use | Slow isolated control | Fast isolated logic | Fast or bidirectional non-isolated logic | I²C/open-drain translation |
Use a phototransistor optocoupler when isolation and a slow, one-way active-low signal are the priorities. Use a logic optocoupler when timing is important. If grounds may be shared, a dedicated translator is normally simpler, faster and more predictable. Toshiba’s level-shifter overview distinguishes open-drain methods from dual-supply translators for bidirectional and higher-performance requirements.
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Common mistakes
- Omitting the output pull-up resistor.
- Connecting the grounds and defeating the intended isolation.
- Using typical rather than minimum guaranteed CTR.
- Choosing a pull-up that demands more collector current than the optocoupler can guarantee.
- Using a very large pull-up and expecting fast edges.
- Ignoring transistor saturation, storage time and propagation-delay asymmetry.
- Forgetting that the circuit inverts.
- Exceeding collector-emitter voltage, collector current or package power ratings.
- Leaving one side unpowered while the other side can back-power it.
- Treating isolation-test voltage as the allowable continuous working voltage.
- Using one conventional channel as a supposedly transparent bidirectional translator.
Troubleshooting checklist
Output never goes high
- Confirm the output-side supply and pull-up resistor are present.
- Check for a short, excessive load or an incorrectly wired collector and emitter.
- Verify that the receiver is not clamping the node.
Low level is too high
- Reduce the required sink current by increasing the pull-up value, if speed permits.
- Increase LED current only within the source and optocoupler ratings.
- Recalculate with minimum CTR at the operating temperature.
Edges are too slow
- Reduce pull-up resistance while checking collector-current limits.
- Reduce output capacitance and trace length.
- Use a logic-output or high-speed optocoupler if saturation and storage time dominate.
Polarity is wrong
The standard stage is inverting. Add an inverter, choose a suitable logic optocoupler, or change the firmware interpretation.
It works at room temperature but fails at extremes
Recheck minimum CTR, LED forward voltage, receiver thresholds and resistor values over the full temperature and supply range. Do not rely on typical curves.
Quick Recap
Final design workflow
- Record input voltage levels, source-current capability, output supply, receiver
VIH/VIL, maximum edge time, polarity, isolation category and temperature range. - Select a phototransistor, logic optocoupler or non-isolated translator based on speed, direction and isolation requirements.
- Choose LED current from the part’s guaranteed CTR and timing specifications, then calculate
RLEDand its power rating. - Calculate required collector current, including pull-up, leakage and external load.
- Select a pull-up that meets the low-level current requirement and the RC rise-time requirement.
- Verify minimum CTR,
VCE, collector current,VCE(sat), timing, temperature derating and isolation ratings at the real operating point. - Test minimum and maximum supplies, hot and cold temperatures, maximum capacitance, startup and power-down states, and the intended cable or trace length.
Component examples
- Vishay SFH615A: conventional phototransistor device for low-speed isolated signals.
- Broadcom HCPL-5701: a high-gain logic-output example specified for low LED current under stated conditions.
- Broadcom ACPL-268KL: a 10-Mb/s-class logic optocoupler with level-shifting listed as an application.
- TI TXS0101: a non-isolated, one-bit bidirectional translator for applications that do not need galvanic isolation.
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