The 2023 Ultra96-V2 walkthrough combines the base and dual-camera designs into one Linux platform image, then makes each programmable-logic (PL) design selectable as a firmware overlay. It reuses the dualcam PetaLinux project for its camera-pipeline drivers but uses the nearly empty base Vivado design as the hardware baseline. The result lets you load either design under a common image; it does not run both designs in the PL at once. The procedure is specific to Avnet’s 2022.2 repositories and tools.
What the two designs contribute
The combination is deliberate: the projects provide different pieces of the shared platform. In the tutorial, the dualcam PetaLinux project supplies Linux support for its MIPI capture pipeline, including V4L2 support, while the base Vivado project provides a simpler hardware starting point because its PL is nearly empty.
| Design | PL functionality | Role in the combined platform |
|---|---|---|
| u96v2_sbc_base | Nearly empty PL | Hardware baseline and a selectable base overlay |
| u96v2_sbc_dualcam | MIPI camera capture pipeline | Provides the richer PetaLinux configuration and a selectable dualcam overlay |
This is the tutorial author’s design choice, not a general rule for combining FPGA projects. It is useful here because the shared Linux image needs the camera-related drivers even when the base hardware is selected.
How the common platform is assembled
The workflow starts from a modified dualcam PetaLinux project, packages it as a BSP, and creates a new PetaLinux project from that BSP. The project is then configured against the base Vivado hardware description. The combination tutorial describes this sequence in its design setup instructions and overlay workflow.
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Clear PL device-tree content from the default tree
When the inherited device tree still describes the dualcam MIPI nodes but the selected hardware is the nearly empty base design, the first build is expected to report missing labels for those nodes. The walkthrough removes PL device-tree generation and design-specific PL descriptions from the default device tree, then rebuilds. The reason is to avoid leaving static descriptions for PL hardware that may not be loaded; each design’s own device-tree content belongs with its overlay.
Package each design as an overlay
The tutorial creates two firmware overlays named avnet_u96v2_base and avnet_u96v2_dualcam. Each example firmware directory contains a bitstream (.bit), a device-tree include (.dtsi), and shell.json. The example shell metadata uses XRT_FLAT and one slot. For these two designs, the tutorial says an .xclbin is not required at this step; that should not be generalized to accelerator designs.
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An overlay keeps the PL configuration and the device-tree description associated with that design. Loading one selects that design for the platform; the examples do not describe concurrent operation of the base and dualcam PL designs.
Load and switch designs with xmutil
In this tutorial’s platform setup, xmutil is the user-facing app-management path and calls DFX-MGR under the hood. It lists available apps, loads a named app, and unloads the current app. The walkthrough describes dynamic loading as applying the bitstream—full or partial reconfiguration as appropriate—along with the associated device-tree content.
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On the running Ultra96-V2 image, list the available apps with
xmutil listapps. The tutorial’s overlays areavnet_u96v2_baseandavnet_u96v2_dualcam. -
Load the design you need with
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To remove the loaded app before changing designs, run
xmutil unloadapp, then load the other app.
Use the base overlay for the simple baseline; use dualcam when the MIPI camera pipeline is needed. The tutorial’s camera example includes a Logitech HD Pro webcam and discusses USB camera passthrough, but that specific webcam is not a requirement for combining the designs.
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Version context and reproduction
The walkthrough was published in 2023 and is built around Avnet repositories and tools marked 2022.2. Its companion build instructions use Vitis 2022.2 and PetaLinux 2022.2 and clone the Avnet HDL and PetaLinux repositories at their 2022.2 branches. Treat these as the versions for reproducing the documented procedure, not as confirmation that the same steps or board support apply unchanged to later releases. The companion tutorial reports package retrieval failures and a workaround for several openamp packages; that is a reported build experience, not a guaranteed issue on every setup. The documented sources do not establish the latest compatible toolchain or present-day support status. See the companion platform build instructions.
Board and setup context
The target is the Tria Technologies Ultra96-V2, based on a Zynq UltraScale+ MPSoC ZU3EG in an SBVA484 package. Avnet’s Hardware User’s Guide lists a quad-core ARM Cortex-A53 application processor, dual-core Cortex-R5 real-time processor, and LPDDR4 external memory. Avnet’s Getting Started Guide describes the board as a platform for exploring the Zynq UltraScale+ MPSoC, where “Designers can create or evaluate designs for both the Zynq Processor Subsystem (PS) and the Programmable Logic (PL) fabric.” See Avnet’s Hardware User’s Guide and Getting Started Guide.
Avnet’s guide lists optional setup accessories including a 12 V, 4 A 96Boards-compliant supply kit (AES-ACC-U96-4APWR), a USB-to-JTAG/UART pod (AES-ACC-U96-JTAG), a Click mezzanine, and an active miniDP-to-HDMI adapter or cable. Confirm compatibility and availability before purchasing; these accessories are setup context rather than prerequisites stated for the overlay mechanism. Details appear in Avnet’s accessory and setup information.
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