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You can sometimes add a communication or arithmetic capability to a PIC design without changing its microcontroller. Don Rowe’s 2005 Embedded.com article “Tricks with PICs” shows how to repurpose built-in peripherals, including using SPI to receive asynchronous serial data, extending UART transmit timing for a particular RS-485 design, and adding handshaking around a parallel slave port. These are device- and timing-dependent techniques—not drop-in features for every PIC.
What “Tricks with PICs” covers
The article addresses a familiar constraint in embedded designs: a project needs another serial channel, more arithmetic precision, or clearer data handshaking, but the existing processor’s built-in resources are already committed. Rowe says he used the techniques with PIC16Cxx, PIC16Fxx, and PIC18Fxx families. That historical range does not establish compatibility with every member of those families or with current devices.
The central trade-off is between reusing a hardware peripheral and implementing behavior in firmware or external logic. Hardware reuse can reduce per-bit software work, but it imposes peripheral-specific timing and pin constraints. External logic can make an interface more explicit, at the cost of pins and components. For a new design, a PIC with the required peripheral may be simpler and better supported than adapting a workaround.
Receive asynchronous serial data through SPI
Asynchronous serial frames carry a start bit, data bits, and a stop bit without a separate clock line. SPI normally shifts data in sync with a clock and often transmits and receives simultaneously. Rowe’s technique uses SPI as a hardware shift register while firmware and a timer arrange for its clock edges to sample the incoming serial data near the centers of the data bits.
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How the timing works
- The falling edge of the incoming start bit provides the initial synchronization cue.
- A capture/compare module records the timer value at that edge. The interrupt routine can use the captured value to compensate for interrupt latency rather than timing everything from when the routine happens to run.
- The timer sets an initial, nonstandard interval so the SPI peripheral skips the start bit; subsequent clock timing places samples within the data bits.
- After the SPI shift completes, firmware reverses the received bit order as needed and handles the byte.
In the article’s worked example, the PIC runs at 16 MHz and receives at 9600 baud. Those are example conditions, not a guaranteed speed or a general limit. The method depends on the selected PIC’s timer, capture/compare, and SPI behavior, along with clock accuracy and the worst-case interrupt latency. If an interrupt can arrive too late to preserve the sampling margin, the byte may be corrupted.
When to consider it
- It may be useful when a design has an unused SPI peripheral but no available UART.
- Compare it with software bit-banging: the SPI peripheral handles shifting, but firmware still has to establish timing, service events, and account for bit order.
- Check the exact MCU datasheet for peripheral modes, pin mapping, timer behavior, and interrupt timing before adapting the idea.
Use UART transmit timing carefully on a shared RS-485 line
Rowe describes a design in which a PIC released a shared RS-485 line when a transmit-shift status bit indicated completion. In that design, the indication did not account for the remote receiver consuming the final stop bit, so the driver could release the line too soon. The article’s device-specific workaround uses the UART’s ninth data bit, controlled through TX9/TX9D, to send an additional high bit and keep the line driven longer.
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This is a design anecdote, not a universal RS-485 rule. A transmit-complete flag’s exact meaning depends on the selected device and flag; determine whether it describes a buffer, shift register, or another event before using it to control driver enable. The extra-bit technique also depends on the UART mode, peer behavior, and framing. For a new design, Rowe recommends considering correct termination and keeping the receiver active during transmission so the sender can observe its own complete transmission. Validate the bus timing and transceiver behavior for the actual system.
Extend arithmetic with a stack-based library
For arithmetic beyond the native precision of an 8-bit PIC, Rowe describes a library inspired by Forth and reverse Polish notation. It uses a parameter stack, reusing its top entries for temporary values. The article also describes stackless functions that receive source and destination pointers, offering a different interface for code that does not want to manipulate the stack.
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The historical article refers to a PicMath.c implementation for the CCS PCM compiler and identifies configuration choices such as stack-data size, stack allocation, a carry data bit, and an option for double-precision multiplication and division. Its linked FTP download is not verified as available today, and the article does not establish that the code compiles with current compilers or PIC devices. Treat the implementation as a historical example; check compiler support, memory use, calling conventions, and numerical requirements before adopting any similar library.
Add explicit handshaking to the parallel slave port
A parallel slave port can expose internal input-buffer-full and output-buffer-full status to PIC firmware. Those internal status signals help the firmware track data, but they do not necessarily tell the external device when data is ready or has been accepted. The interface may need separate handshaking signals.
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Why a ready level can lose synchronization
A simple level-based ready signal can leave sender and receiver disagreeing about whether a transfer has happened, potentially causing duplicated or lost data. The article discusses pulse-based signaling or edge-triggered interrupts as ways to mark events. The right choice depends on the external device’s timing and on how both sides recover from missed or repeated events.
When external logic helps
One approach is to use a PLD or other external logic to reproduce external input- and output-buffer status behavior. That can make readiness visible at the interface, but it costs additional pins and hardware. Define the handshake states and event edges explicitly, then check that the PIC and external device cannot advance on different transfers.
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How to assess a workaround before using it
- Confirm the exact target: identify the MCU model, peripheral instance, available pins, oscillator setup, and applicable silicon documentation.
- Budget timing: include interrupt latency and variation, bit timing, and the time required to act on status flags.
- Check toolchain fit: verify compiler support and library assumptions; do not assume code written for an older family or compiler will transfer unchanged.
- Account for hardware: include pin use, external logic, transceiver behavior, and any termination or receiver requirements.
- Compare against a different device: for a new design, a PIC that already has the needed peripheral may reduce complexity compared with a workaround.
For hands-on evaluation, Microchip describes Curiosity as an 8-bit PIC development platform with an integrated programmer/debugger: Curiosity development board. Microchip’s developer help says most PIC MCUs have at least one development or evaluation board: Microchip developer help. Select a board for the exact target MCU and peripheral support; neither page establishes that the original 2005 code runs unchanged on a current board.
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