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In telecom, synchronization is the delivery of the frequency, phase, or time that network equipment and services need. Holdover is a clock’s continued operation after a timing reference is lost or degraded. It is not a universal number of minutes or hours: performance depends on what the clock has lost, which references remain, the clock’s design, and the applicable specification.
What does synchronization mean in a telecom network?
Synchronization can mean keeping equipment aligned to a common frequency, aligning phase, or maintaining time of day. These are related requirements, but they are not interchangeable. A network that needs frequency synchronization alone may use a different PTP profile and architecture from one that must deliver phase or time as well.
ITU-T’s February 2026 summary states: “Recommendation ITU-T G.8275.1 specifies a profile for telecommunication applications based on the precision time protocol (PTP) as defined in IEEE 1588.” The recommendation covers phase/time and frequency synchronization in networks with full timing support.
Frequency synchronization
Frequency synchronization keeps a clock’s rate aligned with a reference. ITU-T G.8265.1/Y.1365.1 (November 2022) defines a PTP profile for frequency distribution in packet-based networks. Its scope is frequency only; it does not cover applications that require phase alignment or time of day.
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Phase and time synchronization
Phase synchronization aligns timing instants; time synchronization also concerns the clock’s time-of-day value. The relevant PTP profile depends partly on how timing is carried through the network:
- ITU-T G.8275.1 (February 2026) specifies phase/time and frequency synchronization for networks with full timing support.
- ITU-T G.8275.2 (February 2026) addresses phase/time synchronization in networks with partial timing support. Its clock modes distinguish holdover within specification from holdover out of specification; those states do not promise a particular holdover duration.
What is holdover in telecom synchronization?
When a clock loses or detects degradation in a reference, it may continue producing an output using its internal oscillator, another timing input, or a combination. That continued operation is holdover. The output may remain usable for some requirements while its frequency, phase, or time error grows. “The reference failed” is therefore not a sufficient description of a holdover condition: the important question is which inputs failed and which are still available.
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Common input-loss cases
- PTP time is lost, physical-layer frequency remains: the clock may still have a stable frequency source to keep its output ticking at approximately the right rate.
- All phase/time references are lost at a PRTC: it may rely on its local oscillator, an optional external frequency input traceable to a primary reference clock, or both.
- Both PTP and physical-layer frequency are lost: a clock may continue output from its local oscillator, but that does not mean accurate time is maintained.
- A source is degraded rather than absent: the implementation’s quality assessment and switching behavior matter; loss and degradation should not be treated as the same event.
How long can a telecom clock stay in holdover?
There is no single holdover duration that applies to all telecom clocks. It depends on the clock type, its oscillator and other available references, the service’s frequency or phase/time tolerance, environmental conditions, and the applicable performance requirements. A network’s error budget is not automatically a device’s holdover rating.
ITU-T G.8273.2 (June 2023) describes a specific case in which both PTP and physical-layer frequency inputs are lost: the local-oscillator output is not expected to maintain accurate time for more than a few seconds. This is a qualification for that described case, not a general duration for every oscillator, clock, profile, or deployment.
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ITU-T G.8272 (July 2025) describes PRTC phase/time holdover after loss of all phase/time references. The clock may use its local oscillator, an optional external frequency input traceable to a primary reference clock, or both; supported holdover is to comply with the applicable limits for a clock type in G.812. Check the applicable edition before using a G.812 limit: its status page lists a 2004 in-force text and an August 2026 component marked “To be published.”
How do standards budgets differ from equipment specifications?
A standards-based network error budget describes how much error a system can tolerate or allocate across components and operating conditions. It should not be presented as a measured or guaranteed holdover duration for a particular device.
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ITU-T G.8273.4 (August 2024) gives an example that separates local-oscillator holdover from backup-PTP holdover. It explicitly characterizes the assigned holdover quantity as remaining network error budget—the error that may accumulate while meeting a network limit—not as a special equipment holdover performance requirement. Do not infer a device rating or holdover-hours figure from that allocation.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.Which standards and clock functions should you check?
Match the recommendation to the quantity being delivered and the clock’s role. In particular, distinguish packet-based PTP profiles from physical-layer frequency clock requirements and primary-reference clock requirements.
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| Recommendation | Role and scope | Edition or status in the cited material |
|---|---|---|
| G.8265.1/Y.1365.1 | PTP frequency distribution; frequency only, not phase alignment or time of day | November 2022 |
| G.8275.1 | PTP phase/time and frequency with full timing support | February 2026 |
| G.8275.2 | PTP phase/time with partial timing support | February 2026 |
| G.8262.1 | Enhanced synchronous equipment clock characteristics, including bandwidth, frequency accuracy, holdover, and noise generation | November 2025 text; the ITU-T database lists an August 2026 amendment as in force |
| G.8272 | PRTC characteristics, including phase/time holdover following loss of phase/time references | July 2025 |
| G.8273.2 | Telecom boundary and time-synchronous clock behavior, including described input-loss cases | June 2023 |
| G.8273.4 | Partial-support clock performance and an illustrative holdover error-budget allocation | August 2024 |
| G.812 | Clock-type limits referenced by G.8272 | Status page lists a 2004 in-force text and an August 2026 component marked “To be published” |
For G.8262.1, consult the current ITU-T database entry rather than assuming the November 2025 text is the latest edition, because an August 2026 amendment is listed as in force.
How should you compare holdover across equipment or architectures?
Compare like with like. A meaningful evaluation records the service requirement, architecture, failure case, and evidence for the clock’s performance rather than relying on a vendor’s unqualified “holdover” number.
Quick Recap
- Define the required quantity. State whether the service needs frequency only, phase alignment, or time of day/phase plus frequency.
- Identify the timing architecture. Specify full timing support, partial timing support, assisted partial timing support, or physical-layer frequency distribution, and select the profile that matches the actual network.
- Name the failure scenario. Distinguish PTP loss with physical-layer frequency still present, loss of all phase/time references, loss of all timing inputs, and degraded source quality.
- List remaining holdover mechanisms. Record whether the clock uses its local oscillator, a traceable frequency input, backup PTP, or a combination. Do not assume a backup reference exists.
- Check performance evidence and conditions. Look for clock class or category, specified frequency/phase/time error, noise and wander behavior, environmental and temperature conditions, and the exact standards edition.
- Verify state reporting and recovery. Check how the implementation indicates acquiring, locked, holdover within limits, and out-of-specification, and how it returns to a reference. Profile and implementation details affect these states.
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