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SoC PLANNER is a pre-synthesis design flow that connects SoC architecture exploration, workflow orchestration and RTL generation. CEA, Defacto Technologies and Innova Advanced Technologies announced on September 8, 2026, that their three-year collaborative R&D project was ready for early adopters. The announcement presents it as a way to compare architectural options—including an eco-design footprint score—before generating synthesizable RTL for selected configurations.
What SoC PLANNER does
SoC PLANNER is intended to help chip teams explore architecture choices before synthesis. A user defines design parameters, the ranges to investigate, target key performance indicators (KPIs) and priorities such as power, performance or area efficiency. The flow estimates outcomes across those configurations, surfaces trade-offs and can generate RTL for selected options.
It is a planning and design-exploration flow, not a finished chip. The announcement describes the combined flow as spanning specification, design-space exploration, workflow orchestration and RTL generation.
How its components fit together
| Component | Announced role |
|---|---|
| CEA’s A-DECA | Performs multi-objective design-space exploration using simulation, analytical models and AI-assisted optimization. |
| Defacto’s SoC Compiler | Transforms selected architecture configurations into synthesizable RTL. |
| Innova’s PDM | Coordinates design flows, computing resources and engineering data. |
In practical terms, A-DECA explores and evaluates alternatives, SoC Compiler turns chosen configurations into RTL, and PDM manages the associated flow and resources. The announcement positions their integration as an upstream, pre-synthesis process.
#1 Best Overall
What the exploration evaluates
The flow is described as estimating area, performance—including bandwidth and latency—and power over the configuration space. It identifies Pareto-optimal configurations: options where improving one objective would require accepting a worse result on at least one other objective. Teams can use that set to examine trade-offs rather than assuming there is one design that is best on every measure.
The announcement also describes an eco-design footprint score that can be considered alongside conventional power, performance and area objectives. It presents sustainability as an additional design criterion; it does not publish the score’s calculation method or enough detail to compare scores across projects.
Rank #2
Project scenarios and the reported cycle reduction
Configurable AI accelerator
One validation scenario concerned a configurable AI accelerator. The project explored trade-offs involving latency, power, energy use and silicon area, then generated RTL for chosen configurations.
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HPC processor on the Rhea platform
The other scenario involved an HPC processor based on the Rhea platform. The announcement says the project evaluated thousands of architectural alternatives, but does not give a detailed dataset or evaluation protocol.
How to interpret the 30–40% figure
The project partners report up to 30–40% shorter exploration cycles across the industrial use cases. This is a reported project outcome, not a universal guarantee: the announcement does not provide a full benchmark protocol, baseline configurations, uncertainty ranges or independent replication. It describes the two scenarios as project validations and calls the generated RTL implementation-ready, but does not publish a third-party assessment.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.What early-adopter readiness means
CEA, Defacto Technologies and Innova Advanced Technologies announced on September 8, 2026, that SoC PLANNER was “now ready for early-adopters.” CEA-List’s official news listing also records the announcement date. These are partner and institutional announcements, not an independent evaluation.
Rank #4
The announcement establishes early-adopter readiness, but not general release or a public route to obtain the platform. Pricing, licensing terms, procurement options and a public signup path are not stated in the announcement. The project was funded by BPI France as part of the France 2030 program.
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