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What should you optimize first?
Write down what the system does, when it must respond, and what must remain available while it waits. Those requirements determine whether a deeper low-power state is useful or too costly to enter and leave.
- Duty cycle: Identify active periods and idle windows, including how often they occur and how long they last.
- Response deadline: Establish the maximum acceptable wake-up and processing time after an event.
- Wake sources: List the timers, sensors, communications interfaces, or other events that must be able to resume operation.
- Retained state: Decide which data must survive a low-power state and which software or hardware state can be rebuilt.
- System constraints: Record required throughput, peak demand, physical or thermal limits, and implementation cost.
Then look for avoidable active time: unnecessary polling, repeated work, or processing that can be scheduled more efficiently. Reducing the amount of work or time spent active can matter as much as selecting a lower-power state.
Which low-power state should you use?
There is no universally best state. Lower consumption can come with longer wake-up latency, less retained state, or unavailable peripherals. Texas Instruments states in its AM62x Processor SDK documentation that each mode must be evaluated against power-consumption and wake-up-latency requirements. Its named modes and behavior apply to the AM62x family and that SDK, not to every embedded processor; use the applicable device documentation for mode details and numeric values.
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| State or approach | What it can mean | What to check |
|---|---|---|
| Running | The component is powered and operating. | Active power, useful work completed, and whether the workload can finish sooner or with less activity. |
| Clock-gated | A component’s clock is stopped or gated while its power may remain on. | Which functions and state remain available, and the time and energy needed to resume activity. |
| Retention | Selected state is preserved while some activity or power is reduced. | Exactly what is retained, what must be restored, and the associated wake-up behavior. |
| Powered down | A component or domain is switched off. | Whether state is lost, what must be reinitialized, and whether dependent resources can also be shut down. |
These are component-state categories described in Arm’s 2021 guide to Cortex-M-based subsystem power control and SoC power-domain architecture. They are not a promise that every chip implements the same states or gives them the same names. A processor sleep state also does not automatically clock-gate, retain, or power down the rest of the system; those are design and configuration choices.
How do CPU, memory, DMA, and peripherals affect each other?
Map the dependencies among the CPU, SRAM, interconnect, DMA, and peripherals before shutting down a domain. A DMA engine or another bus master may still need memory or interconnect access while the CPU is idle. Powering down a shared resource it depends on can interrupt transfers or prevent expected operation.
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For each operating state, record which components must remain powered or clocked, which may enter a retention state, and which can be shut down. Include wake sources in that map: a peripheral needed to detect an event cannot be fully unavailable during the wait unless another mechanism can detect the event and restore it. Arm’s guide describes power-state control and dependencies at the subsystem and SoC level; the exact dependency rules must come from the target device’s documentation.
How should you compare two design choices?
Compare alternatives under the same representative workload and operating conditions. A low average-power result can hide high peaks, longer response times, or extra work during restart. Consider these measures together:
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- Average and peak power: Capture idle periods and bursts, rather than relying on a single reading.
- Energy per task: Compare the energy used to complete the same defined task, including any wake-up and reinitialization work.
- Wake latency: Check whether resume time leaves enough room to meet the application’s response deadline.
- Retained state: Account for data preserved and the cost of restoring or recalculating lost state.
- Availability: Include the peripherals, wake sources, DMA activity, memory, and interconnect that must remain usable.
- Performance and implementation cost: Weigh speed and power alongside development effort and hardware cost. Arm Education’s Efficient Embedded Systems Design material identifies speed, cost, and power as implementation evaluation dimensions.
Use the applicable processor datasheet for numeric state values. The TI AM62x SDK’s power-versus-latency guidance is specific to that family; it is not a substitute for the datasheet or a basis for transferring figures to another device.
How do you measure embedded-system power?
Measure the target design in its intended configuration, with a repeatable workload and realistic operating conditions. Instrument choice and connection method matter: current range, resolution, sampling and logging capability, bandwidth, and where the instrument is inserted can affect what the measurement reveals. A generic multimeter may not capture brief peaks or low-current behavior needed for a particular design.
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- Define the workload: Specify the task, event rate, active and idle periods, enabled peripherals, and relevant environmental or supply conditions.
- Choose the measurement point and instrument: Select a method and instrument suitable for the expected current range and time variation, while accounting for any measurement effect on the circuit.
- Capture representative activity: Record enough time to include normal idle intervals, wake-ups, and active work. Repeat runs where needed to check consistency.
- Report the conditions: State the board and supply path, workload, operating conditions, measurement interval, instrument or method, and relevant uncertainty so results can be interpreted and repeated.
- Compare like with like: Keep workload and test conditions consistent when comparing modes or design changes; examine average and peak power as well as energy per task.
The U.S. Department of Energy’s Federal Energy Management Program summarizes IEC 62301 guidance for standby measurements of mains-connected end-user devices. In that context, fluctuating consumption is measured over time and divided by the measurement period to obtain average power; a stable reading is defined as less than 5% variation from the mean over five minutes. That stability criterion belongs to the specified standby-measurement context. It is not an embedded-board performance statistic or a complete embedded-system test standard.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.What is a practical design decision process?
- Set requirements: Document the duty cycle, response deadline, wake sources, required retained state, and performance needs.
- Find opportunities: Identify unnecessary work and long or frequent active periods that could be reduced.
- Map resource dependencies: Document which CPU, memory, interconnect, DMA, and peripheral resources must remain available for each operating condition.
- Select candidate states: Use the target device’s documentation to identify states that fit the requirements, then check consumption, wake latency, retained state, and peripheral availability.
- Measure and validate: Test candidates with the same representative workload and a suitable measurement method. Confirm both the power result and that timing and function still meet requirements.
Keep the resulting state and dependency map with the design documentation. It makes trade-offs visible and helps prevent a later change to a wake source, peripheral, or DMA path from invalidating the power assumptions.
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