A PCIe 5.0 retimer restores and retransmits high-speed signals when loss in a board, connectors, vias, or cable threatens the link. Some retimers also support CXL 2.0, but the label alone does not guarantee compatibility with every CXL platform. Broadcom’s BCM85657 is one documented 16-lane example; its stated reach figure is a loss rating, not a distance in metres.
What a PCIe 5.0 retimer does
PCIe 5.0 signals at 32 GT/s per lane. At that rate, losses through board traces, connectors, vias, and cables can compromise signal integrity. A retimer is an active component that recovers and retransmits the data so a link can span a more challenging channel than it could otherwise tolerate.
There is no single distance figure that applies to every PCIe 5.0 retimer installation. Reach depends on the channel and system design, and a loss figure is not interchangeable with a cable-length rating. For example, Broadcom says its BCM85657 extends the reach between a root complex and endpoint by more than 40 dB of loss on both sides at 32 GT/s. That is the product brief’s stated loss capability, not a promise of a particular number of metres.
What CXL 2.0 support means
CXL 2.0 uses the PCIe physical and link infrastructure. Its Flex Bus capability information includes retimer-awareness fields for Retimer1 and Retimer2 (Compute Express Link Consortium, 2020). A device advertised for both PCIe Gen5 and CXL 2.0 is intended to support either protocol over the relevant physical link, but the claim does not establish compatibility with every host, endpoint, topology, or configuration. Platform interoperability and link-training behavior still need validation.
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Documented PCIe 5.0 device examples
| Device | Type and lanes | Supported protocols or rates stated | Other documented details |
|---|---|---|---|
| Broadcom BCM85657 | Retimer; 16 lanes | PCIe Gen5/Gen4/Gen3/Gen2/Gen1; CXL 2.0; 32 GT/s Gen5 | More than 40 dB of loss extension on both sides at 32 GT/s; lane groupings of 1×16, 2×8, 4×4, or 8×2; low-latency mode; automatic link training sets transmit FIR settings. Sources: Broadcom product brief and product page. |
| Texas Instruments DS320PR1601 | Linear repeater/redriver; 16 lanes | 32 Gbps; designed for PCIe 5.0, CXL 2.0, UPI 2.0, and other interfaces | It is a redriver, not a retimer. The cited product documents do not establish the BCM85657’s reach figure or feature set for this device. Sources: Texas Instruments, 2023. |
| Phison PS7201 | Bidirectional retimer IC; 16 lanes | PCIe 5.0 and CXL applications | Lane bifurcation in 1×16, 2×8, 4×4, and 8×2 configurations. The cited brochure does not state a reach figure here. Source: Phison brochure, 2025. |
These are examples documented by their manufacturers, not a complete market comparison or a statement of current stock. The published details above are not a substitute for checking the exact device revision and platform requirements.
Retimer versus redriver
The terms are not interchangeable. A retimer recovers and retransmits the link signal; a redriver conditions the signal as a linear repeater. The distinction matters because a product described as a PCIe 5.0 repeater is not automatically a retimer with the same behavior or capabilities. TI’s DS320PR1601 is specifically identified as a linear repeater/redriver, so it should be evaluated as a redriver alternative, not counted as a retimer.
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How to choose a retimer for a system
Start with the platform’s topology and channel problem, then compare the device documentation against the design. The following criteria help distinguish a plausible fit from a protocol label that is too broad to establish compatibility:
- Protocol and generation: Confirm the required PCIe generation and whether the specific CXL version and use case are supported.
- Lane count and bifurcation: Match the device’s lanes and supported groupings to the root complex, endpoints, and board routing. A stated 16-lane capacity does not by itself establish that every lane arrangement is supported.
- Channel loss: Compare the product’s stated loss capability with the actual channel budget. Do not turn a dB figure into a cable-length estimate without a channel-specific design analysis.
- Latency and link training: Check whether the design needs a low-latency mode and how transmit settings are selected. Broadcom documents low-latency mode and automatic transmit FIR-setting link training for the BCM85657; those features should not be assumed for other devices.
- Physical and system fit: Verify package and footprint compatibility, thermal and power constraints, and any required firmware or management interface against the exact device revision and platform design. The cited product summaries do not establish those details for every example.
- Validation and sourcing: Confirm interoperability in the intended system and verify supply-channel availability before making a design commitment.
What compliance testing can tell you
PCI-SIG publishes a dedicated Retimer Test Specification. Its Revision 5.0 listing, dated March 6, 2024, says the specification is intended to confirm whether a stand-alone retimer complies with the PCIe Base Specification. That is useful evidence when assessing standards compliance, but it does not replace checking CXL support or validating a retimer in the target platform.
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